/*
Copyright (C) 2018-2019 de4dot@gmail.com

Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:

The above copyright notice and this permission notice shall be
included in all copies or substantial portions of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/

use wasm_bindgen::prelude::*;

// GENERATOR-BEGIN: Enum
// ⚠️This was generated by GENERATOR!🦹‍♂️
/// x86 instruction code
#[wasm_bindgen]
#[derive(Copy, Clone)]
#[allow(non_camel_case_types)]
#[allow(missing_docs)]
pub enum Code {
	INVALID = 0,
	DeclareByte = 1,
	DeclareWord = 2,
	DeclareDword = 3,
	DeclareQword = 4,
	Add_rm8_r8 = 5,
	Add_rm16_r16 = 6,
	Add_rm32_r32 = 7,
	Add_rm64_r64 = 8,
	Add_r8_rm8 = 9,
	Add_r16_rm16 = 10,
	Add_r32_rm32 = 11,
	Add_r64_rm64 = 12,
	Add_AL_imm8 = 13,
	Add_AX_imm16 = 14,
	Add_EAX_imm32 = 15,
	Add_RAX_imm32 = 16,
	Pushw_ES = 17,
	Pushd_ES = 18,
	Popw_ES = 19,
	Popd_ES = 20,
	Or_rm8_r8 = 21,
	Or_rm16_r16 = 22,
	Or_rm32_r32 = 23,
	Or_rm64_r64 = 24,
	Or_r8_rm8 = 25,
	Or_r16_rm16 = 26,
	Or_r32_rm32 = 27,
	Or_r64_rm64 = 28,
	Or_AL_imm8 = 29,
	Or_AX_imm16 = 30,
	Or_EAX_imm32 = 31,
	Or_RAX_imm32 = 32,
	Pushw_CS = 33,
	Pushd_CS = 34,
	Popw_CS = 35,
	Adc_rm8_r8 = 36,
	Adc_rm16_r16 = 37,
	Adc_rm32_r32 = 38,
	Adc_rm64_r64 = 39,
	Adc_r8_rm8 = 40,
	Adc_r16_rm16 = 41,
	Adc_r32_rm32 = 42,
	Adc_r64_rm64 = 43,
	Adc_AL_imm8 = 44,
	Adc_AX_imm16 = 45,
	Adc_EAX_imm32 = 46,
	Adc_RAX_imm32 = 47,
	Pushw_SS = 48,
	Pushd_SS = 49,
	Popw_SS = 50,
	Popd_SS = 51,
	Sbb_rm8_r8 = 52,
	Sbb_rm16_r16 = 53,
	Sbb_rm32_r32 = 54,
	Sbb_rm64_r64 = 55,
	Sbb_r8_rm8 = 56,
	Sbb_r16_rm16 = 57,
	Sbb_r32_rm32 = 58,
	Sbb_r64_rm64 = 59,
	Sbb_AL_imm8 = 60,
	Sbb_AX_imm16 = 61,
	Sbb_EAX_imm32 = 62,
	Sbb_RAX_imm32 = 63,
	Pushw_DS = 64,
	Pushd_DS = 65,
	Popw_DS = 66,
	Popd_DS = 67,
	And_rm8_r8 = 68,
	And_rm16_r16 = 69,
	And_rm32_r32 = 70,
	And_rm64_r64 = 71,
	And_r8_rm8 = 72,
	And_r16_rm16 = 73,
	And_r32_rm32 = 74,
	And_r64_rm64 = 75,
	And_AL_imm8 = 76,
	And_AX_imm16 = 77,
	And_EAX_imm32 = 78,
	And_RAX_imm32 = 79,
	Daa = 80,
	Sub_rm8_r8 = 81,
	Sub_rm16_r16 = 82,
	Sub_rm32_r32 = 83,
	Sub_rm64_r64 = 84,
	Sub_r8_rm8 = 85,
	Sub_r16_rm16 = 86,
	Sub_r32_rm32 = 87,
	Sub_r64_rm64 = 88,
	Sub_AL_imm8 = 89,
	Sub_AX_imm16 = 90,
	Sub_EAX_imm32 = 91,
	Sub_RAX_imm32 = 92,
	Das = 93,
	Xor_rm8_r8 = 94,
	Xor_rm16_r16 = 95,
	Xor_rm32_r32 = 96,
	Xor_rm64_r64 = 97,
	Xor_r8_rm8 = 98,
	Xor_r16_rm16 = 99,
	Xor_r32_rm32 = 100,
	Xor_r64_rm64 = 101,
	Xor_AL_imm8 = 102,
	Xor_AX_imm16 = 103,
	Xor_EAX_imm32 = 104,
	Xor_RAX_imm32 = 105,
	Aaa = 106,
	Cmp_rm8_r8 = 107,
	Cmp_rm16_r16 = 108,
	Cmp_rm32_r32 = 109,
	Cmp_rm64_r64 = 110,
	Cmp_r8_rm8 = 111,
	Cmp_r16_rm16 = 112,
	Cmp_r32_rm32 = 113,
	Cmp_r64_rm64 = 114,
	Cmp_AL_imm8 = 115,
	Cmp_AX_imm16 = 116,
	Cmp_EAX_imm32 = 117,
	Cmp_RAX_imm32 = 118,
	Aas = 119,
	Inc_r16 = 120,
	Inc_r32 = 121,
	Dec_r16 = 122,
	Dec_r32 = 123,
	Push_r16 = 124,
	Push_r32 = 125,
	Push_r64 = 126,
	Pop_r16 = 127,
	Pop_r32 = 128,
	Pop_r64 = 129,
	Pushaw = 130,
	Pushad = 131,
	Popaw = 132,
	Popad = 133,
	Bound_r16_m1616 = 134,
	Bound_r32_m3232 = 135,
	Arpl_rm16_r16 = 136,
	Arpl_r32m16_r32 = 137,
	Movsxd_r16_rm16 = 138,
	Movsxd_r32_rm32 = 139,
	Movsxd_r64_rm32 = 140,
	Push_imm16 = 141,
	Pushd_imm32 = 142,
	Pushq_imm32 = 143,
	Imul_r16_rm16_imm16 = 144,
	Imul_r32_rm32_imm32 = 145,
	Imul_r64_rm64_imm32 = 146,
	Pushw_imm8 = 147,
	Pushd_imm8 = 148,
	Pushq_imm8 = 149,
	Imul_r16_rm16_imm8 = 150,
	Imul_r32_rm32_imm8 = 151,
	Imul_r64_rm64_imm8 = 152,
	Insb_m8_DX = 153,
	Insw_m16_DX = 154,
	Insd_m32_DX = 155,
	Outsb_DX_m8 = 156,
	Outsw_DX_m16 = 157,
	Outsd_DX_m32 = 158,
	Jo_rel8_16 = 159,
	Jo_rel8_32 = 160,
	Jo_rel8_64 = 161,
	Jno_rel8_16 = 162,
	Jno_rel8_32 = 163,
	Jno_rel8_64 = 164,
	Jb_rel8_16 = 165,
	Jb_rel8_32 = 166,
	Jb_rel8_64 = 167,
	Jae_rel8_16 = 168,
	Jae_rel8_32 = 169,
	Jae_rel8_64 = 170,
	Je_rel8_16 = 171,
	Je_rel8_32 = 172,
	Je_rel8_64 = 173,
	Jne_rel8_16 = 174,
	Jne_rel8_32 = 175,
	Jne_rel8_64 = 176,
	Jbe_rel8_16 = 177,
	Jbe_rel8_32 = 178,
	Jbe_rel8_64 = 179,
	Ja_rel8_16 = 180,
	Ja_rel8_32 = 181,
	Ja_rel8_64 = 182,
	Js_rel8_16 = 183,
	Js_rel8_32 = 184,
	Js_rel8_64 = 185,
	Jns_rel8_16 = 186,
	Jns_rel8_32 = 187,
	Jns_rel8_64 = 188,
	Jp_rel8_16 = 189,
	Jp_rel8_32 = 190,
	Jp_rel8_64 = 191,
	Jnp_rel8_16 = 192,
	Jnp_rel8_32 = 193,
	Jnp_rel8_64 = 194,
	Jl_rel8_16 = 195,
	Jl_rel8_32 = 196,
	Jl_rel8_64 = 197,
	Jge_rel8_16 = 198,
	Jge_rel8_32 = 199,
	Jge_rel8_64 = 200,
	Jle_rel8_16 = 201,
	Jle_rel8_32 = 202,
	Jle_rel8_64 = 203,
	Jg_rel8_16 = 204,
	Jg_rel8_32 = 205,
	Jg_rel8_64 = 206,
	Add_rm8_imm8 = 207,
	Or_rm8_imm8 = 208,
	Adc_rm8_imm8 = 209,
	Sbb_rm8_imm8 = 210,
	And_rm8_imm8 = 211,
	Sub_rm8_imm8 = 212,
	Xor_rm8_imm8 = 213,
	Cmp_rm8_imm8 = 214,
	Add_rm16_imm16 = 215,
	Add_rm32_imm32 = 216,
	Add_rm64_imm32 = 217,
	Or_rm16_imm16 = 218,
	Or_rm32_imm32 = 219,
	Or_rm64_imm32 = 220,
	Adc_rm16_imm16 = 221,
	Adc_rm32_imm32 = 222,
	Adc_rm64_imm32 = 223,
	Sbb_rm16_imm16 = 224,
	Sbb_rm32_imm32 = 225,
	Sbb_rm64_imm32 = 226,
	And_rm16_imm16 = 227,
	And_rm32_imm32 = 228,
	And_rm64_imm32 = 229,
	Sub_rm16_imm16 = 230,
	Sub_rm32_imm32 = 231,
	Sub_rm64_imm32 = 232,
	Xor_rm16_imm16 = 233,
	Xor_rm32_imm32 = 234,
	Xor_rm64_imm32 = 235,
	Cmp_rm16_imm16 = 236,
	Cmp_rm32_imm32 = 237,
	Cmp_rm64_imm32 = 238,
	Add_rm8_imm8_82 = 239,
	Or_rm8_imm8_82 = 240,
	Adc_rm8_imm8_82 = 241,
	Sbb_rm8_imm8_82 = 242,
	And_rm8_imm8_82 = 243,
	Sub_rm8_imm8_82 = 244,
	Xor_rm8_imm8_82 = 245,
	Cmp_rm8_imm8_82 = 246,
	Add_rm16_imm8 = 247,
	Add_rm32_imm8 = 248,
	Add_rm64_imm8 = 249,
	Or_rm16_imm8 = 250,
	Or_rm32_imm8 = 251,
	Or_rm64_imm8 = 252,
	Adc_rm16_imm8 = 253,
	Adc_rm32_imm8 = 254,
	Adc_rm64_imm8 = 255,
	Sbb_rm16_imm8 = 256,
	Sbb_rm32_imm8 = 257,
	Sbb_rm64_imm8 = 258,
	And_rm16_imm8 = 259,
	And_rm32_imm8 = 260,
	And_rm64_imm8 = 261,
	Sub_rm16_imm8 = 262,
	Sub_rm32_imm8 = 263,
	Sub_rm64_imm8 = 264,
	Xor_rm16_imm8 = 265,
	Xor_rm32_imm8 = 266,
	Xor_rm64_imm8 = 267,
	Cmp_rm16_imm8 = 268,
	Cmp_rm32_imm8 = 269,
	Cmp_rm64_imm8 = 270,
	Test_rm8_r8 = 271,
	Test_rm16_r16 = 272,
	Test_rm32_r32 = 273,
	Test_rm64_r64 = 274,
	Xchg_rm8_r8 = 275,
	Xchg_rm16_r16 = 276,
	Xchg_rm32_r32 = 277,
	Xchg_rm64_r64 = 278,
	Mov_rm8_r8 = 279,
	Mov_rm16_r16 = 280,
	Mov_rm32_r32 = 281,
	Mov_rm64_r64 = 282,
	Mov_r8_rm8 = 283,
	Mov_r16_rm16 = 284,
	Mov_r32_rm32 = 285,
	Mov_r64_rm64 = 286,
	Mov_rm16_Sreg = 287,
	Mov_r32m16_Sreg = 288,
	Mov_r64m16_Sreg = 289,
	Lea_r16_m = 290,
	Lea_r32_m = 291,
	Lea_r64_m = 292,
	Mov_Sreg_rm16 = 293,
	Mov_Sreg_r32m16 = 294,
	Mov_Sreg_r64m16 = 295,
	Pop_rm16 = 296,
	Pop_rm32 = 297,
	Pop_rm64 = 298,
	Nopw = 299,
	Nopd = 300,
	Nopq = 301,
	Xchg_r16_AX = 302,
	Xchg_r32_EAX = 303,
	Xchg_r64_RAX = 304,
	Pause = 305,
	Cbw = 306,
	Cwde = 307,
	Cdqe = 308,
	Cwd = 309,
	Cdq = 310,
	Cqo = 311,
	Call_ptr1616 = 312,
	Call_ptr1632 = 313,
	Wait = 314,
	Pushfw = 315,
	Pushfd = 316,
	Pushfq = 317,
	Popfw = 318,
	Popfd = 319,
	Popfq = 320,
	Sahf = 321,
	Lahf = 322,
	Mov_AL_moffs8 = 323,
	Mov_AX_moffs16 = 324,
	Mov_EAX_moffs32 = 325,
	Mov_RAX_moffs64 = 326,
	Mov_moffs8_AL = 327,
	Mov_moffs16_AX = 328,
	Mov_moffs32_EAX = 329,
	Mov_moffs64_RAX = 330,
	Movsb_m8_m8 = 331,
	Movsw_m16_m16 = 332,
	Movsd_m32_m32 = 333,
	Movsq_m64_m64 = 334,
	Cmpsb_m8_m8 = 335,
	Cmpsw_m16_m16 = 336,
	Cmpsd_m32_m32 = 337,
	Cmpsq_m64_m64 = 338,
	Test_AL_imm8 = 339,
	Test_AX_imm16 = 340,
	Test_EAX_imm32 = 341,
	Test_RAX_imm32 = 342,
	Stosb_m8_AL = 343,
	Stosw_m16_AX = 344,
	Stosd_m32_EAX = 345,
	Stosq_m64_RAX = 346,
	Lodsb_AL_m8 = 347,
	Lodsw_AX_m16 = 348,
	Lodsd_EAX_m32 = 349,
	Lodsq_RAX_m64 = 350,
	Scasb_AL_m8 = 351,
	Scasw_AX_m16 = 352,
	Scasd_EAX_m32 = 353,
	Scasq_RAX_m64 = 354,
	Mov_r8_imm8 = 355,
	Mov_r16_imm16 = 356,
	Mov_r32_imm32 = 357,
	Mov_r64_imm64 = 358,
	Rol_rm8_imm8 = 359,
	Ror_rm8_imm8 = 360,
	Rcl_rm8_imm8 = 361,
	Rcr_rm8_imm8 = 362,
	Shl_rm8_imm8 = 363,
	Shr_rm8_imm8 = 364,
	Sal_rm8_imm8 = 365,
	Sar_rm8_imm8 = 366,
	Rol_rm16_imm8 = 367,
	Rol_rm32_imm8 = 368,
	Rol_rm64_imm8 = 369,
	Ror_rm16_imm8 = 370,
	Ror_rm32_imm8 = 371,
	Ror_rm64_imm8 = 372,
	Rcl_rm16_imm8 = 373,
	Rcl_rm32_imm8 = 374,
	Rcl_rm64_imm8 = 375,
	Rcr_rm16_imm8 = 376,
	Rcr_rm32_imm8 = 377,
	Rcr_rm64_imm8 = 378,
	Shl_rm16_imm8 = 379,
	Shl_rm32_imm8 = 380,
	Shl_rm64_imm8 = 381,
	Shr_rm16_imm8 = 382,
	Shr_rm32_imm8 = 383,
	Shr_rm64_imm8 = 384,
	Sal_rm16_imm8 = 385,
	Sal_rm32_imm8 = 386,
	Sal_rm64_imm8 = 387,
	Sar_rm16_imm8 = 388,
	Sar_rm32_imm8 = 389,
	Sar_rm64_imm8 = 390,
	Retnw_imm16 = 391,
	Retnd_imm16 = 392,
	Retnq_imm16 = 393,
	Retnw = 394,
	Retnd = 395,
	Retnq = 396,
	Les_r16_m1616 = 397,
	Les_r32_m1632 = 398,
	Lds_r16_m1616 = 399,
	Lds_r32_m1632 = 400,
	Mov_rm8_imm8 = 401,
	Xabort_imm8 = 402,
	Mov_rm16_imm16 = 403,
	Mov_rm32_imm32 = 404,
	Mov_rm64_imm32 = 405,
	Xbegin_rel16 = 406,
	Xbegin_rel32 = 407,
	Enterw_imm16_imm8 = 408,
	Enterd_imm16_imm8 = 409,
	Enterq_imm16_imm8 = 410,
	Leavew = 411,
	Leaved = 412,
	Leaveq = 413,
	Retfw_imm16 = 414,
	Retfd_imm16 = 415,
	Retfq_imm16 = 416,
	Retfw = 417,
	Retfd = 418,
	Retfq = 419,
	Int3 = 420,
	Int_imm8 = 421,
	Into = 422,
	Iretw = 423,
	Iretd = 424,
	Iretq = 425,
	Rol_rm8_1 = 426,
	Ror_rm8_1 = 427,
	Rcl_rm8_1 = 428,
	Rcr_rm8_1 = 429,
	Shl_rm8_1 = 430,
	Shr_rm8_1 = 431,
	Sal_rm8_1 = 432,
	Sar_rm8_1 = 433,
	Rol_rm16_1 = 434,
	Rol_rm32_1 = 435,
	Rol_rm64_1 = 436,
	Ror_rm16_1 = 437,
	Ror_rm32_1 = 438,
	Ror_rm64_1 = 439,
	Rcl_rm16_1 = 440,
	Rcl_rm32_1 = 441,
	Rcl_rm64_1 = 442,
	Rcr_rm16_1 = 443,
	Rcr_rm32_1 = 444,
	Rcr_rm64_1 = 445,
	Shl_rm16_1 = 446,
	Shl_rm32_1 = 447,
	Shl_rm64_1 = 448,
	Shr_rm16_1 = 449,
	Shr_rm32_1 = 450,
	Shr_rm64_1 = 451,
	Sal_rm16_1 = 452,
	Sal_rm32_1 = 453,
	Sal_rm64_1 = 454,
	Sar_rm16_1 = 455,
	Sar_rm32_1 = 456,
	Sar_rm64_1 = 457,
	Rol_rm8_CL = 458,
	Ror_rm8_CL = 459,
	Rcl_rm8_CL = 460,
	Rcr_rm8_CL = 461,
	Shl_rm8_CL = 462,
	Shr_rm8_CL = 463,
	Sal_rm8_CL = 464,
	Sar_rm8_CL = 465,
	Rol_rm16_CL = 466,
	Rol_rm32_CL = 467,
	Rol_rm64_CL = 468,
	Ror_rm16_CL = 469,
	Ror_rm32_CL = 470,
	Ror_rm64_CL = 471,
	Rcl_rm16_CL = 472,
	Rcl_rm32_CL = 473,
	Rcl_rm64_CL = 474,
	Rcr_rm16_CL = 475,
	Rcr_rm32_CL = 476,
	Rcr_rm64_CL = 477,
	Shl_rm16_CL = 478,
	Shl_rm32_CL = 479,
	Shl_rm64_CL = 480,
	Shr_rm16_CL = 481,
	Shr_rm32_CL = 482,
	Shr_rm64_CL = 483,
	Sal_rm16_CL = 484,
	Sal_rm32_CL = 485,
	Sal_rm64_CL = 486,
	Sar_rm16_CL = 487,
	Sar_rm32_CL = 488,
	Sar_rm64_CL = 489,
	Aam_imm8 = 490,
	Aad_imm8 = 491,
	Salc = 492,
	Xlat_m8 = 493,
	Fadd_m32fp = 494,
	Fmul_m32fp = 495,
	Fcom_m32fp = 496,
	Fcomp_m32fp = 497,
	Fsub_m32fp = 498,
	Fsubr_m32fp = 499,
	Fdiv_m32fp = 500,
	Fdivr_m32fp = 501,
	Fadd_st0_sti = 502,
	Fmul_st0_sti = 503,
	Fcom_st0_sti = 504,
	Fcomp_st0_sti = 505,
	Fsub_st0_sti = 506,
	Fsubr_st0_sti = 507,
	Fdiv_st0_sti = 508,
	Fdivr_st0_sti = 509,
	Fld_m32fp = 510,
	Fst_m32fp = 511,
	Fstp_m32fp = 512,
	Fldenv_m14byte = 513,
	Fldenv_m28byte = 514,
	Fldcw_m2byte = 515,
	Fnstenv_m14byte = 516,
	Fstenv_m14byte = 517,
	Fnstenv_m28byte = 518,
	Fstenv_m28byte = 519,
	Fnstcw_m2byte = 520,
	Fstcw_m2byte = 521,
	Fld_st0_sti = 522,
	Fxch_st0_sti = 523,
	Fnop = 524,
	Fstpnce_sti = 525,
	Fchs = 526,
	Fabs = 527,
	Ftst = 528,
	Fxam = 529,
	Fld1 = 530,
	Fldl2t = 531,
	Fldl2e = 532,
	Fldpi = 533,
	Fldlg2 = 534,
	Fldln2 = 535,
	Fldz = 536,
	F2xm1 = 537,
	Fyl2x = 538,
	Fptan = 539,
	Fpatan = 540,
	Fxtract = 541,
	Fprem1 = 542,
	Fdecstp = 543,
	Fincstp = 544,
	Fprem = 545,
	Fyl2xp1 = 546,
	Fsqrt = 547,
	Fsincos = 548,
	Frndint = 549,
	Fscale = 550,
	Fsin = 551,
	Fcos = 552,
	Fiadd_m32int = 553,
	Fimul_m32int = 554,
	Ficom_m32int = 555,
	Ficomp_m32int = 556,
	Fisub_m32int = 557,
	Fisubr_m32int = 558,
	Fidiv_m32int = 559,
	Fidivr_m32int = 560,
	Fcmovb_st0_sti = 561,
	Fcmove_st0_sti = 562,
	Fcmovbe_st0_sti = 563,
	Fcmovu_st0_sti = 564,
	Fucompp = 565,
	Fild_m32int = 566,
	Fisttp_m32int = 567,
	Fist_m32int = 568,
	Fistp_m32int = 569,
	Fld_m80fp = 570,
	Fstp_m80fp = 571,
	Fcmovnb_st0_sti = 572,
	Fcmovne_st0_sti = 573,
	Fcmovnbe_st0_sti = 574,
	Fcmovnu_st0_sti = 575,
	Fneni = 576,
	Feni = 577,
	Fndisi = 578,
	Fdisi = 579,
	Fnclex = 580,
	Fclex = 581,
	Fninit = 582,
	Finit = 583,
	Fnsetpm = 584,
	Fsetpm = 585,
	Frstpm = 586,
	Fucomi_st0_sti = 587,
	Fcomi_st0_sti = 588,
	Fadd_m64fp = 589,
	Fmul_m64fp = 590,
	Fcom_m64fp = 591,
	Fcomp_m64fp = 592,
	Fsub_m64fp = 593,
	Fsubr_m64fp = 594,
	Fdiv_m64fp = 595,
	Fdivr_m64fp = 596,
	Fadd_sti_st0 = 597,
	Fmul_sti_st0 = 598,
	Fcom_st0_sti_DCD0 = 599,
	Fcomp_st0_sti_DCD8 = 600,
	Fsubr_sti_st0 = 601,
	Fsub_sti_st0 = 602,
	Fdivr_sti_st0 = 603,
	Fdiv_sti_st0 = 604,
	Fld_m64fp = 605,
	Fisttp_m64int = 606,
	Fst_m64fp = 607,
	Fstp_m64fp = 608,
	Frstor_m94byte = 609,
	Frstor_m108byte = 610,
	Fnsave_m94byte = 611,
	Fsave_m94byte = 612,
	Fnsave_m108byte = 613,
	Fsave_m108byte = 614,
	Fnstsw_m2byte = 615,
	Fstsw_m2byte = 616,
	Ffree_sti = 617,
	Fxch_st0_sti_DDC8 = 618,
	Fst_sti = 619,
	Fstp_sti = 620,
	Fucom_st0_sti = 621,
	Fucomp_st0_sti = 622,
	Fiadd_m16int = 623,
	Fimul_m16int = 624,
	Ficom_m16int = 625,
	Ficomp_m16int = 626,
	Fisub_m16int = 627,
	Fisubr_m16int = 628,
	Fidiv_m16int = 629,
	Fidivr_m16int = 630,
	Faddp_sti_st0 = 631,
	Fmulp_sti_st0 = 632,
	Fcomp_st0_sti_DED0 = 633,
	Fcompp = 634,
	Fsubrp_sti_st0 = 635,
	Fsubp_sti_st0 = 636,
	Fdivrp_sti_st0 = 637,
	Fdivp_sti_st0 = 638,
	Fild_m16int = 639,
	Fisttp_m16int = 640,
	Fist_m16int = 641,
	Fistp_m16int = 642,
	Fbld_m80bcd = 643,
	Fild_m64int = 644,
	Fbstp_m80bcd = 645,
	Fistp_m64int = 646,
	Ffreep_sti = 647,
	Fxch_st0_sti_DFC8 = 648,
	Fstp_sti_DFD0 = 649,
	Fstp_sti_DFD8 = 650,
	Fnstsw_AX = 651,
	Fstsw_AX = 652,
	Fstdw_AX = 653,
	Fstsg_AX = 654,
	Fucomip_st0_sti = 655,
	Fcomip_st0_sti = 656,
	Loopne_rel8_16_CX = 657,
	Loopne_rel8_32_CX = 658,
	Loopne_rel8_16_ECX = 659,
	Loopne_rel8_32_ECX = 660,
	Loopne_rel8_64_ECX = 661,
	Loopne_rel8_16_RCX = 662,
	Loopne_rel8_64_RCX = 663,
	Loope_rel8_16_CX = 664,
	Loope_rel8_32_CX = 665,
	Loope_rel8_16_ECX = 666,
	Loope_rel8_32_ECX = 667,
	Loope_rel8_64_ECX = 668,
	Loope_rel8_16_RCX = 669,
	Loope_rel8_64_RCX = 670,
	Loop_rel8_16_CX = 671,
	Loop_rel8_32_CX = 672,
	Loop_rel8_16_ECX = 673,
	Loop_rel8_32_ECX = 674,
	Loop_rel8_64_ECX = 675,
	Loop_rel8_16_RCX = 676,
	Loop_rel8_64_RCX = 677,
	Jcxz_rel8_16 = 678,
	Jcxz_rel8_32 = 679,
	Jecxz_rel8_16 = 680,
	Jecxz_rel8_32 = 681,
	Jecxz_rel8_64 = 682,
	Jrcxz_rel8_16 = 683,
	Jrcxz_rel8_64 = 684,
	In_AL_imm8 = 685,
	In_AX_imm8 = 686,
	In_EAX_imm8 = 687,
	Out_imm8_AL = 688,
	Out_imm8_AX = 689,
	Out_imm8_EAX = 690,
	Call_rel16 = 691,
	Call_rel32_32 = 692,
	Call_rel32_64 = 693,
	Jmp_rel16 = 694,
	Jmp_rel32_32 = 695,
	Jmp_rel32_64 = 696,
	Jmp_ptr1616 = 697,
	Jmp_ptr1632 = 698,
	Jmp_rel8_16 = 699,
	Jmp_rel8_32 = 700,
	Jmp_rel8_64 = 701,
	In_AL_DX = 702,
	In_AX_DX = 703,
	In_EAX_DX = 704,
	Out_DX_AL = 705,
	Out_DX_AX = 706,
	Out_DX_EAX = 707,
	Int1 = 708,
	Hlt = 709,
	Cmc = 710,
	Test_rm8_imm8 = 711,
	Test_rm8_imm8_F6r1 = 712,
	Not_rm8 = 713,
	Neg_rm8 = 714,
	Mul_rm8 = 715,
	Imul_rm8 = 716,
	Div_rm8 = 717,
	Idiv_rm8 = 718,
	Test_rm16_imm16 = 719,
	Test_rm32_imm32 = 720,
	Test_rm64_imm32 = 721,
	Test_rm16_imm16_F7r1 = 722,
	Test_rm32_imm32_F7r1 = 723,
	Test_rm64_imm32_F7r1 = 724,
	Not_rm16 = 725,
	Not_rm32 = 726,
	Not_rm64 = 727,
	Neg_rm16 = 728,
	Neg_rm32 = 729,
	Neg_rm64 = 730,
	Mul_rm16 = 731,
	Mul_rm32 = 732,
	Mul_rm64 = 733,
	Imul_rm16 = 734,
	Imul_rm32 = 735,
	Imul_rm64 = 736,
	Div_rm16 = 737,
	Div_rm32 = 738,
	Div_rm64 = 739,
	Idiv_rm16 = 740,
	Idiv_rm32 = 741,
	Idiv_rm64 = 742,
	Clc = 743,
	Stc = 744,
	Cli = 745,
	Sti = 746,
	Cld = 747,
	Std = 748,
	Inc_rm8 = 749,
	Dec_rm8 = 750,
	Inc_rm16 = 751,
	Inc_rm32 = 752,
	Inc_rm64 = 753,
	Dec_rm16 = 754,
	Dec_rm32 = 755,
	Dec_rm64 = 756,
	Call_rm16 = 757,
	Call_rm32 = 758,
	Call_rm64 = 759,
	Call_m1616 = 760,
	Call_m1632 = 761,
	Call_m1664 = 762,
	Jmp_rm16 = 763,
	Jmp_rm32 = 764,
	Jmp_rm64 = 765,
	Jmp_m1616 = 766,
	Jmp_m1632 = 767,
	Jmp_m1664 = 768,
	Push_rm16 = 769,
	Push_rm32 = 770,
	Push_rm64 = 771,
	Sldt_rm16 = 772,
	Sldt_r32m16 = 773,
	Sldt_r64m16 = 774,
	Str_rm16 = 775,
	Str_r32m16 = 776,
	Str_r64m16 = 777,
	Lldt_rm16 = 778,
	Lldt_r32m16 = 779,
	Lldt_r64m16 = 780,
	Ltr_rm16 = 781,
	Ltr_r32m16 = 782,
	Ltr_r64m16 = 783,
	Verr_rm16 = 784,
	Verr_r32m16 = 785,
	Verr_r64m16 = 786,
	Verw_rm16 = 787,
	Verw_r32m16 = 788,
	Verw_r64m16 = 789,
	Jmpe_rm16 = 790,
	Jmpe_rm32 = 791,
	Sgdt_m1632_16 = 792,
	Sgdt_m1632 = 793,
	Sgdt_m1664 = 794,
	Sidt_m1632_16 = 795,
	Sidt_m1632 = 796,
	Sidt_m1664 = 797,
	Lgdt_m1632_16 = 798,
	Lgdt_m1632 = 799,
	Lgdt_m1664 = 800,
	Lidt_m1632_16 = 801,
	Lidt_m1632 = 802,
	Lidt_m1664 = 803,
	Smsw_rm16 = 804,
	Smsw_r32m16 = 805,
	Smsw_r64m16 = 806,
	Rstorssp_m64 = 807,
	Lmsw_rm16 = 808,
	Lmsw_r32m16 = 809,
	Lmsw_r64m16 = 810,
	Invlpg_m = 811,
	Enclv = 812,
	Vmcall = 813,
	Vmlaunch = 814,
	Vmresume = 815,
	Vmxoff = 816,
	Pconfig = 817,
	Monitorw = 818,
	Monitord = 819,
	Monitorq = 820,
	Mwait = 821,
	Clac = 822,
	Stac = 823,
	Encls = 824,
	Xgetbv = 825,
	Xsetbv = 826,
	Vmfunc = 827,
	Xend = 828,
	Xtest = 829,
	Enclu = 830,
	Vmrunw = 831,
	Vmrund = 832,
	Vmrunq = 833,
	Vmmcall = 834,
	Vmloadw = 835,
	Vmloadd = 836,
	Vmloadq = 837,
	Vmsavew = 838,
	Vmsaved = 839,
	Vmsaveq = 840,
	Stgi = 841,
	Clgi = 842,
	Skinit = 843,
	Invlpgaw = 844,
	Invlpgad = 845,
	Invlpgaq = 846,
	Setssbsy = 847,
	Saveprevssp = 848,
	Rdpkru = 849,
	Wrpkru = 850,
	Swapgs = 851,
	Rdtscp = 852,
	Monitorxw = 853,
	Monitorxd = 854,
	Monitorxq = 855,
	Mcommit = 856,
	Mwaitx = 857,
	Clzerow = 858,
	Clzerod = 859,
	Clzeroq = 860,
	Rdpru = 861,
	Lar_r16_rm16 = 862,
	Lar_r32_r32m16 = 863,
	Lar_r64_r64m16 = 864,
	Lsl_r16_rm16 = 865,
	Lsl_r32_r32m16 = 866,
	Lsl_r64_r64m16 = 867,
	Loadallreset286 = 868,
	Loadall286 = 869,
	Syscall = 870,
	Clts = 871,
	Loadall386 = 872,
	Sysretd = 873,
	Sysretq = 874,
	Invd = 875,
	Wbinvd = 876,
	Wbnoinvd = 877,
	Cl1invmb = 878,
	Ud2 = 879,
	ReservedNop_rm16_r16_0F0D = 880,
	ReservedNop_rm32_r32_0F0D = 881,
	ReservedNop_rm64_r64_0F0D = 882,
	Prefetch_m8 = 883,
	Prefetchw_m8 = 884,
	Prefetchwt1_m8 = 885,
	Femms = 886,
	Umov_rm8_r8 = 887,
	Umov_rm16_r16 = 888,
	Umov_rm32_r32 = 889,
	Umov_r8_rm8 = 890,
	Umov_r16_rm16 = 891,
	Umov_r32_rm32 = 892,
	Movups_xmm_xmmm128 = 893,
	VEX_Vmovups_xmm_xmmm128 = 894,
	VEX_Vmovups_ymm_ymmm256 = 895,
	EVEX_Vmovups_xmm_k1z_xmmm128 = 896,
	EVEX_Vmovups_ymm_k1z_ymmm256 = 897,
	EVEX_Vmovups_zmm_k1z_zmmm512 = 898,
	Movupd_xmm_xmmm128 = 899,
	VEX_Vmovupd_xmm_xmmm128 = 900,
	VEX_Vmovupd_ymm_ymmm256 = 901,
	EVEX_Vmovupd_xmm_k1z_xmmm128 = 902,
	EVEX_Vmovupd_ymm_k1z_ymmm256 = 903,
	EVEX_Vmovupd_zmm_k1z_zmmm512 = 904,
	Movss_xmm_xmmm32 = 905,
	VEX_Vmovss_xmm_xmm_xmm = 906,
	VEX_Vmovss_xmm_m32 = 907,
	EVEX_Vmovss_xmm_k1z_xmm_xmm = 908,
	EVEX_Vmovss_xmm_k1z_m32 = 909,
	Movsd_xmm_xmmm64 = 910,
	VEX_Vmovsd_xmm_xmm_xmm = 911,
	VEX_Vmovsd_xmm_m64 = 912,
	EVEX_Vmovsd_xmm_k1z_xmm_xmm = 913,
	EVEX_Vmovsd_xmm_k1z_m64 = 914,
	Movups_xmmm128_xmm = 915,
	VEX_Vmovups_xmmm128_xmm = 916,
	VEX_Vmovups_ymmm256_ymm = 917,
	EVEX_Vmovups_xmmm128_k1z_xmm = 918,
	EVEX_Vmovups_ymmm256_k1z_ymm = 919,
	EVEX_Vmovups_zmmm512_k1z_zmm = 920,
	Movupd_xmmm128_xmm = 921,
	VEX_Vmovupd_xmmm128_xmm = 922,
	VEX_Vmovupd_ymmm256_ymm = 923,
	EVEX_Vmovupd_xmmm128_k1z_xmm = 924,
	EVEX_Vmovupd_ymmm256_k1z_ymm = 925,
	EVEX_Vmovupd_zmmm512_k1z_zmm = 926,
	Movss_xmmm32_xmm = 927,
	VEX_Vmovss_xmm_xmm_xmm_0F11 = 928,
	VEX_Vmovss_m32_xmm = 929,
	EVEX_Vmovss_xmm_k1z_xmm_xmm_0F11 = 930,
	EVEX_Vmovss_m32_k1_xmm = 931,
	Movsd_xmmm64_xmm = 932,
	VEX_Vmovsd_xmm_xmm_xmm_0F11 = 933,
	VEX_Vmovsd_m64_xmm = 934,
	EVEX_Vmovsd_xmm_k1z_xmm_xmm_0F11 = 935,
	EVEX_Vmovsd_m64_k1_xmm = 936,
	Movhlps_xmm_xmm = 937,
	Movlps_xmm_m64 = 938,
	VEX_Vmovhlps_xmm_xmm_xmm = 939,
	VEX_Vmovlps_xmm_xmm_m64 = 940,
	EVEX_Vmovhlps_xmm_xmm_xmm = 941,
	EVEX_Vmovlps_xmm_xmm_m64 = 942,
	Movlpd_xmm_m64 = 943,
	VEX_Vmovlpd_xmm_xmm_m64 = 944,
	EVEX_Vmovlpd_xmm_xmm_m64 = 945,
	Movsldup_xmm_xmmm128 = 946,
	VEX_Vmovsldup_xmm_xmmm128 = 947,
	VEX_Vmovsldup_ymm_ymmm256 = 948,
	EVEX_Vmovsldup_xmm_k1z_xmmm128 = 949,
	EVEX_Vmovsldup_ymm_k1z_ymmm256 = 950,
	EVEX_Vmovsldup_zmm_k1z_zmmm512 = 951,
	Movddup_xmm_xmmm64 = 952,
	VEX_Vmovddup_xmm_xmmm64 = 953,
	VEX_Vmovddup_ymm_ymmm256 = 954,
	EVEX_Vmovddup_xmm_k1z_xmmm64 = 955,
	EVEX_Vmovddup_ymm_k1z_ymmm256 = 956,
	EVEX_Vmovddup_zmm_k1z_zmmm512 = 957,
	Movlps_m64_xmm = 958,
	VEX_Vmovlps_m64_xmm = 959,
	EVEX_Vmovlps_m64_xmm = 960,
	Movlpd_m64_xmm = 961,
	VEX_Vmovlpd_m64_xmm = 962,
	EVEX_Vmovlpd_m64_xmm = 963,
	Unpcklps_xmm_xmmm128 = 964,
	VEX_Vunpcklps_xmm_xmm_xmmm128 = 965,
	VEX_Vunpcklps_ymm_ymm_ymmm256 = 966,
	EVEX_Vunpcklps_xmm_k1z_xmm_xmmm128b32 = 967,
	EVEX_Vunpcklps_ymm_k1z_ymm_ymmm256b32 = 968,
	EVEX_Vunpcklps_zmm_k1z_zmm_zmmm512b32 = 969,
	Unpcklpd_xmm_xmmm128 = 970,
	VEX_Vunpcklpd_xmm_xmm_xmmm128 = 971,
	VEX_Vunpcklpd_ymm_ymm_ymmm256 = 972,
	EVEX_Vunpcklpd_xmm_k1z_xmm_xmmm128b64 = 973,
	EVEX_Vunpcklpd_ymm_k1z_ymm_ymmm256b64 = 974,
	EVEX_Vunpcklpd_zmm_k1z_zmm_zmmm512b64 = 975,
	Unpckhps_xmm_xmmm128 = 976,
	VEX_Vunpckhps_xmm_xmm_xmmm128 = 977,
	VEX_Vunpckhps_ymm_ymm_ymmm256 = 978,
	EVEX_Vunpckhps_xmm_k1z_xmm_xmmm128b32 = 979,
	EVEX_Vunpckhps_ymm_k1z_ymm_ymmm256b32 = 980,
	EVEX_Vunpckhps_zmm_k1z_zmm_zmmm512b32 = 981,
	Unpckhpd_xmm_xmmm128 = 982,
	VEX_Vunpckhpd_xmm_xmm_xmmm128 = 983,
	VEX_Vunpckhpd_ymm_ymm_ymmm256 = 984,
	EVEX_Vunpckhpd_xmm_k1z_xmm_xmmm128b64 = 985,
	EVEX_Vunpckhpd_ymm_k1z_ymm_ymmm256b64 = 986,
	EVEX_Vunpckhpd_zmm_k1z_zmm_zmmm512b64 = 987,
	Movlhps_xmm_xmm = 988,
	VEX_Vmovlhps_xmm_xmm_xmm = 989,
	EVEX_Vmovlhps_xmm_xmm_xmm = 990,
	Movhps_xmm_m64 = 991,
	VEX_Vmovhps_xmm_xmm_m64 = 992,
	EVEX_Vmovhps_xmm_xmm_m64 = 993,
	Movhpd_xmm_m64 = 994,
	VEX_Vmovhpd_xmm_xmm_m64 = 995,
	EVEX_Vmovhpd_xmm_xmm_m64 = 996,
	Movshdup_xmm_xmmm128 = 997,
	VEX_Vmovshdup_xmm_xmmm128 = 998,
	VEX_Vmovshdup_ymm_ymmm256 = 999,
	EVEX_Vmovshdup_xmm_k1z_xmmm128 = 1000,
	EVEX_Vmovshdup_ymm_k1z_ymmm256 = 1001,
	EVEX_Vmovshdup_zmm_k1z_zmmm512 = 1002,
	Movhps_m64_xmm = 1003,
	VEX_Vmovhps_m64_xmm = 1004,
	EVEX_Vmovhps_m64_xmm = 1005,
	Movhpd_m64_xmm = 1006,
	VEX_Vmovhpd_m64_xmm = 1007,
	EVEX_Vmovhpd_m64_xmm = 1008,
	ReservedNop_rm16_r16_0F18 = 1009,
	ReservedNop_rm32_r32_0F18 = 1010,
	ReservedNop_rm64_r64_0F18 = 1011,
	ReservedNop_rm16_r16_0F19 = 1012,
	ReservedNop_rm32_r32_0F19 = 1013,
	ReservedNop_rm64_r64_0F19 = 1014,
	ReservedNop_rm16_r16_0F1A = 1015,
	ReservedNop_rm32_r32_0F1A = 1016,
	ReservedNop_rm64_r64_0F1A = 1017,
	ReservedNop_rm16_r16_0F1B = 1018,
	ReservedNop_rm32_r32_0F1B = 1019,
	ReservedNop_rm64_r64_0F1B = 1020,
	ReservedNop_rm16_r16_0F1C = 1021,
	ReservedNop_rm32_r32_0F1C = 1022,
	ReservedNop_rm64_r64_0F1C = 1023,
	ReservedNop_rm16_r16_0F1D = 1024,
	ReservedNop_rm32_r32_0F1D = 1025,
	ReservedNop_rm64_r64_0F1D = 1026,
	ReservedNop_rm16_r16_0F1E = 1027,
	ReservedNop_rm32_r32_0F1E = 1028,
	ReservedNop_rm64_r64_0F1E = 1029,
	ReservedNop_rm16_r16_0F1F = 1030,
	ReservedNop_rm32_r32_0F1F = 1031,
	ReservedNop_rm64_r64_0F1F = 1032,
	Prefetchnta_m8 = 1033,
	Prefetcht0_m8 = 1034,
	Prefetcht1_m8 = 1035,
	Prefetcht2_m8 = 1036,
	Bndldx_bnd_mib = 1037,
	Bndmov_bnd_bndm64 = 1038,
	Bndmov_bnd_bndm128 = 1039,
	Bndcl_bnd_rm32 = 1040,
	Bndcl_bnd_rm64 = 1041,
	Bndcu_bnd_rm32 = 1042,
	Bndcu_bnd_rm64 = 1043,
	Bndstx_mib_bnd = 1044,
	Bndmov_bndm64_bnd = 1045,
	Bndmov_bndm128_bnd = 1046,
	Bndmk_bnd_m32 = 1047,
	Bndmk_bnd_m64 = 1048,
	Bndcn_bnd_rm32 = 1049,
	Bndcn_bnd_rm64 = 1050,
	Cldemote_m8 = 1051,
	Rdsspd_r32 = 1052,
	Rdsspq_r64 = 1053,
	Endbr64 = 1054,
	Endbr32 = 1055,
	Nop_rm16 = 1056,
	Nop_rm32 = 1057,
	Nop_rm64 = 1058,
	Mov_r32_cr = 1059,
	Mov_r64_cr = 1060,
	Mov_r32_dr = 1061,
	Mov_r64_dr = 1062,
	Mov_cr_r32 = 1063,
	Mov_cr_r64 = 1064,
	Mov_dr_r32 = 1065,
	Mov_dr_r64 = 1066,
	Mov_r32_tr = 1067,
	Mov_tr_r32 = 1068,
	Movaps_xmm_xmmm128 = 1069,
	VEX_Vmovaps_xmm_xmmm128 = 1070,
	VEX_Vmovaps_ymm_ymmm256 = 1071,
	EVEX_Vmovaps_xmm_k1z_xmmm128 = 1072,
	EVEX_Vmovaps_ymm_k1z_ymmm256 = 1073,
	EVEX_Vmovaps_zmm_k1z_zmmm512 = 1074,
	Movapd_xmm_xmmm128 = 1075,
	VEX_Vmovapd_xmm_xmmm128 = 1076,
	VEX_Vmovapd_ymm_ymmm256 = 1077,
	EVEX_Vmovapd_xmm_k1z_xmmm128 = 1078,
	EVEX_Vmovapd_ymm_k1z_ymmm256 = 1079,
	EVEX_Vmovapd_zmm_k1z_zmmm512 = 1080,
	Movaps_xmmm128_xmm = 1081,
	VEX_Vmovaps_xmmm128_xmm = 1082,
	VEX_Vmovaps_ymmm256_ymm = 1083,
	EVEX_Vmovaps_xmmm128_k1z_xmm = 1084,
	EVEX_Vmovaps_ymmm256_k1z_ymm = 1085,
	EVEX_Vmovaps_zmmm512_k1z_zmm = 1086,
	Movapd_xmmm128_xmm = 1087,
	VEX_Vmovapd_xmmm128_xmm = 1088,
	VEX_Vmovapd_ymmm256_ymm = 1089,
	EVEX_Vmovapd_xmmm128_k1z_xmm = 1090,
	EVEX_Vmovapd_ymmm256_k1z_ymm = 1091,
	EVEX_Vmovapd_zmmm512_k1z_zmm = 1092,
	Cvtpi2ps_xmm_mmm64 = 1093,
	Cvtpi2pd_xmm_mmm64 = 1094,
	Cvtsi2ss_xmm_rm32 = 1095,
	Cvtsi2ss_xmm_rm64 = 1096,
	VEX_Vcvtsi2ss_xmm_xmm_rm32 = 1097,
	VEX_Vcvtsi2ss_xmm_xmm_rm64 = 1098,
	EVEX_Vcvtsi2ss_xmm_xmm_rm32_er = 1099,
	EVEX_Vcvtsi2ss_xmm_xmm_rm64_er = 1100,
	Cvtsi2sd_xmm_rm32 = 1101,
	Cvtsi2sd_xmm_rm64 = 1102,
	VEX_Vcvtsi2sd_xmm_xmm_rm32 = 1103,
	VEX_Vcvtsi2sd_xmm_xmm_rm64 = 1104,
	EVEX_Vcvtsi2sd_xmm_xmm_rm32_er = 1105,
	EVEX_Vcvtsi2sd_xmm_xmm_rm64_er = 1106,
	Movntps_m128_xmm = 1107,
	VEX_Vmovntps_m128_xmm = 1108,
	VEX_Vmovntps_m256_ymm = 1109,
	EVEX_Vmovntps_m128_xmm = 1110,
	EVEX_Vmovntps_m256_ymm = 1111,
	EVEX_Vmovntps_m512_zmm = 1112,
	Movntpd_m128_xmm = 1113,
	VEX_Vmovntpd_m128_xmm = 1114,
	VEX_Vmovntpd_m256_ymm = 1115,
	EVEX_Vmovntpd_m128_xmm = 1116,
	EVEX_Vmovntpd_m256_ymm = 1117,
	EVEX_Vmovntpd_m512_zmm = 1118,
	Movntss_m32_xmm = 1119,
	Movntsd_m64_xmm = 1120,
	Cvttps2pi_mm_xmmm64 = 1121,
	Cvttpd2pi_mm_xmmm128 = 1122,
	Cvttss2si_r32_xmmm32 = 1123,
	Cvttss2si_r64_xmmm32 = 1124,
	VEX_Vcvttss2si_r32_xmmm32 = 1125,
	VEX_Vcvttss2si_r64_xmmm32 = 1126,
	EVEX_Vcvttss2si_r32_xmmm32_sae = 1127,
	EVEX_Vcvttss2si_r64_xmmm32_sae = 1128,
	Cvttsd2si_r32_xmmm64 = 1129,
	Cvttsd2si_r64_xmmm64 = 1130,
	VEX_Vcvttsd2si_r32_xmmm64 = 1131,
	VEX_Vcvttsd2si_r64_xmmm64 = 1132,
	EVEX_Vcvttsd2si_r32_xmmm64_sae = 1133,
	EVEX_Vcvttsd2si_r64_xmmm64_sae = 1134,
	Cvtps2pi_mm_xmmm64 = 1135,
	Cvtpd2pi_mm_xmmm128 = 1136,
	Cvtss2si_r32_xmmm32 = 1137,
	Cvtss2si_r64_xmmm32 = 1138,
	VEX_Vcvtss2si_r32_xmmm32 = 1139,
	VEX_Vcvtss2si_r64_xmmm32 = 1140,
	EVEX_Vcvtss2si_r32_xmmm32_er = 1141,
	EVEX_Vcvtss2si_r64_xmmm32_er = 1142,
	Cvtsd2si_r32_xmmm64 = 1143,
	Cvtsd2si_r64_xmmm64 = 1144,
	VEX_Vcvtsd2si_r32_xmmm64 = 1145,
	VEX_Vcvtsd2si_r64_xmmm64 = 1146,
	EVEX_Vcvtsd2si_r32_xmmm64_er = 1147,
	EVEX_Vcvtsd2si_r64_xmmm64_er = 1148,
	Ucomiss_xmm_xmmm32 = 1149,
	VEX_Vucomiss_xmm_xmmm32 = 1150,
	EVEX_Vucomiss_xmm_xmmm32_sae = 1151,
	Ucomisd_xmm_xmmm64 = 1152,
	VEX_Vucomisd_xmm_xmmm64 = 1153,
	EVEX_Vucomisd_xmm_xmmm64_sae = 1154,
	Comiss_xmm_xmmm32 = 1155,
	Comisd_xmm_xmmm64 = 1156,
	VEX_Vcomiss_xmm_xmmm32 = 1157,
	VEX_Vcomisd_xmm_xmmm64 = 1158,
	EVEX_Vcomiss_xmm_xmmm32_sae = 1159,
	EVEX_Vcomisd_xmm_xmmm64_sae = 1160,
	Wrmsr = 1161,
	Rdtsc = 1162,
	Rdmsr = 1163,
	Rdpmc = 1164,
	Sysenter = 1165,
	Sysexitd = 1166,
	Sysexitq = 1167,
	Getsec = 1168,
	Cmovo_r16_rm16 = 1169,
	Cmovo_r32_rm32 = 1170,
	Cmovo_r64_rm64 = 1171,
	Cmovno_r16_rm16 = 1172,
	Cmovno_r32_rm32 = 1173,
	Cmovno_r64_rm64 = 1174,
	Cmovb_r16_rm16 = 1175,
	Cmovb_r32_rm32 = 1176,
	Cmovb_r64_rm64 = 1177,
	Cmovae_r16_rm16 = 1178,
	Cmovae_r32_rm32 = 1179,
	Cmovae_r64_rm64 = 1180,
	Cmove_r16_rm16 = 1181,
	Cmove_r32_rm32 = 1182,
	Cmove_r64_rm64 = 1183,
	Cmovne_r16_rm16 = 1184,
	Cmovne_r32_rm32 = 1185,
	Cmovne_r64_rm64 = 1186,
	Cmovbe_r16_rm16 = 1187,
	Cmovbe_r32_rm32 = 1188,
	Cmovbe_r64_rm64 = 1189,
	Cmova_r16_rm16 = 1190,
	Cmova_r32_rm32 = 1191,
	Cmova_r64_rm64 = 1192,
	Cmovs_r16_rm16 = 1193,
	Cmovs_r32_rm32 = 1194,
	Cmovs_r64_rm64 = 1195,
	Cmovns_r16_rm16 = 1196,
	Cmovns_r32_rm32 = 1197,
	Cmovns_r64_rm64 = 1198,
	Cmovp_r16_rm16 = 1199,
	Cmovp_r32_rm32 = 1200,
	Cmovp_r64_rm64 = 1201,
	Cmovnp_r16_rm16 = 1202,
	Cmovnp_r32_rm32 = 1203,
	Cmovnp_r64_rm64 = 1204,
	Cmovl_r16_rm16 = 1205,
	Cmovl_r32_rm32 = 1206,
	Cmovl_r64_rm64 = 1207,
	Cmovge_r16_rm16 = 1208,
	Cmovge_r32_rm32 = 1209,
	Cmovge_r64_rm64 = 1210,
	Cmovle_r16_rm16 = 1211,
	Cmovle_r32_rm32 = 1212,
	Cmovle_r64_rm64 = 1213,
	Cmovg_r16_rm16 = 1214,
	Cmovg_r32_rm32 = 1215,
	Cmovg_r64_rm64 = 1216,
	VEX_Kandw_k_k_k = 1217,
	VEX_Kandq_k_k_k = 1218,
	VEX_Kandb_k_k_k = 1219,
	VEX_Kandd_k_k_k = 1220,
	VEX_Kandnw_k_k_k = 1221,
	VEX_Kandnq_k_k_k = 1222,
	VEX_Kandnb_k_k_k = 1223,
	VEX_Kandnd_k_k_k = 1224,
	VEX_Knotw_k_k = 1225,
	VEX_Knotq_k_k = 1226,
	VEX_Knotb_k_k = 1227,
	VEX_Knotd_k_k = 1228,
	VEX_Korw_k_k_k = 1229,
	VEX_Korq_k_k_k = 1230,
	VEX_Korb_k_k_k = 1231,
	VEX_Kord_k_k_k = 1232,
	VEX_Kxnorw_k_k_k = 1233,
	VEX_Kxnorq_k_k_k = 1234,
	VEX_Kxnorb_k_k_k = 1235,
	VEX_Kxnord_k_k_k = 1236,
	VEX_Kxorw_k_k_k = 1237,
	VEX_Kxorq_k_k_k = 1238,
	VEX_Kxorb_k_k_k = 1239,
	VEX_Kxord_k_k_k = 1240,
	VEX_Kaddw_k_k_k = 1241,
	VEX_Kaddq_k_k_k = 1242,
	VEX_Kaddb_k_k_k = 1243,
	VEX_Kaddd_k_k_k = 1244,
	VEX_Kunpckwd_k_k_k = 1245,
	VEX_Kunpckdq_k_k_k = 1246,
	VEX_Kunpckbw_k_k_k = 1247,
	Movmskps_r32_xmm = 1248,
	Movmskps_r64_xmm = 1249,
	VEX_Vmovmskps_r32_xmm = 1250,
	VEX_Vmovmskps_r64_xmm = 1251,
	VEX_Vmovmskps_r32_ymm = 1252,
	VEX_Vmovmskps_r64_ymm = 1253,
	Movmskpd_r32_xmm = 1254,
	Movmskpd_r64_xmm = 1255,
	VEX_Vmovmskpd_r32_xmm = 1256,
	VEX_Vmovmskpd_r64_xmm = 1257,
	VEX_Vmovmskpd_r32_ymm = 1258,
	VEX_Vmovmskpd_r64_ymm = 1259,
	Sqrtps_xmm_xmmm128 = 1260,
	VEX_Vsqrtps_xmm_xmmm128 = 1261,
	VEX_Vsqrtps_ymm_ymmm256 = 1262,
	EVEX_Vsqrtps_xmm_k1z_xmmm128b32 = 1263,
	EVEX_Vsqrtps_ymm_k1z_ymmm256b32 = 1264,
	EVEX_Vsqrtps_zmm_k1z_zmmm512b32_er = 1265,
	Sqrtpd_xmm_xmmm128 = 1266,
	VEX_Vsqrtpd_xmm_xmmm128 = 1267,
	VEX_Vsqrtpd_ymm_ymmm256 = 1268,
	EVEX_Vsqrtpd_xmm_k1z_xmmm128b64 = 1269,
	EVEX_Vsqrtpd_ymm_k1z_ymmm256b64 = 1270,
	EVEX_Vsqrtpd_zmm_k1z_zmmm512b64_er = 1271,
	Sqrtss_xmm_xmmm32 = 1272,
	VEX_Vsqrtss_xmm_xmm_xmmm32 = 1273,
	EVEX_Vsqrtss_xmm_k1z_xmm_xmmm32_er = 1274,
	Sqrtsd_xmm_xmmm64 = 1275,
	VEX_Vsqrtsd_xmm_xmm_xmmm64 = 1276,
	EVEX_Vsqrtsd_xmm_k1z_xmm_xmmm64_er = 1277,
	Rsqrtps_xmm_xmmm128 = 1278,
	VEX_Vrsqrtps_xmm_xmmm128 = 1279,
	VEX_Vrsqrtps_ymm_ymmm256 = 1280,
	Rsqrtss_xmm_xmmm32 = 1281,
	VEX_Vrsqrtss_xmm_xmm_xmmm32 = 1282,
	Rcpps_xmm_xmmm128 = 1283,
	VEX_Vrcpps_xmm_xmmm128 = 1284,
	VEX_Vrcpps_ymm_ymmm256 = 1285,
	Rcpss_xmm_xmmm32 = 1286,
	VEX_Vrcpss_xmm_xmm_xmmm32 = 1287,
	Andps_xmm_xmmm128 = 1288,
	VEX_Vandps_xmm_xmm_xmmm128 = 1289,
	VEX_Vandps_ymm_ymm_ymmm256 = 1290,
	EVEX_Vandps_xmm_k1z_xmm_xmmm128b32 = 1291,
	EVEX_Vandps_ymm_k1z_ymm_ymmm256b32 = 1292,
	EVEX_Vandps_zmm_k1z_zmm_zmmm512b32 = 1293,
	Andpd_xmm_xmmm128 = 1294,
	VEX_Vandpd_xmm_xmm_xmmm128 = 1295,
	VEX_Vandpd_ymm_ymm_ymmm256 = 1296,
	EVEX_Vandpd_xmm_k1z_xmm_xmmm128b64 = 1297,
	EVEX_Vandpd_ymm_k1z_ymm_ymmm256b64 = 1298,
	EVEX_Vandpd_zmm_k1z_zmm_zmmm512b64 = 1299,
	Andnps_xmm_xmmm128 = 1300,
	VEX_Vandnps_xmm_xmm_xmmm128 = 1301,
	VEX_Vandnps_ymm_ymm_ymmm256 = 1302,
	EVEX_Vandnps_xmm_k1z_xmm_xmmm128b32 = 1303,
	EVEX_Vandnps_ymm_k1z_ymm_ymmm256b32 = 1304,
	EVEX_Vandnps_zmm_k1z_zmm_zmmm512b32 = 1305,
	Andnpd_xmm_xmmm128 = 1306,
	VEX_Vandnpd_xmm_xmm_xmmm128 = 1307,
	VEX_Vandnpd_ymm_ymm_ymmm256 = 1308,
	EVEX_Vandnpd_xmm_k1z_xmm_xmmm128b64 = 1309,
	EVEX_Vandnpd_ymm_k1z_ymm_ymmm256b64 = 1310,
	EVEX_Vandnpd_zmm_k1z_zmm_zmmm512b64 = 1311,
	Orps_xmm_xmmm128 = 1312,
	VEX_Vorps_xmm_xmm_xmmm128 = 1313,
	VEX_Vorps_ymm_ymm_ymmm256 = 1314,
	EVEX_Vorps_xmm_k1z_xmm_xmmm128b32 = 1315,
	EVEX_Vorps_ymm_k1z_ymm_ymmm256b32 = 1316,
	EVEX_Vorps_zmm_k1z_zmm_zmmm512b32 = 1317,
	Orpd_xmm_xmmm128 = 1318,
	VEX_Vorpd_xmm_xmm_xmmm128 = 1319,
	VEX_Vorpd_ymm_ymm_ymmm256 = 1320,
	EVEX_Vorpd_xmm_k1z_xmm_xmmm128b64 = 1321,
	EVEX_Vorpd_ymm_k1z_ymm_ymmm256b64 = 1322,
	EVEX_Vorpd_zmm_k1z_zmm_zmmm512b64 = 1323,
	Xorps_xmm_xmmm128 = 1324,
	VEX_Vxorps_xmm_xmm_xmmm128 = 1325,
	VEX_Vxorps_ymm_ymm_ymmm256 = 1326,
	EVEX_Vxorps_xmm_k1z_xmm_xmmm128b32 = 1327,
	EVEX_Vxorps_ymm_k1z_ymm_ymmm256b32 = 1328,
	EVEX_Vxorps_zmm_k1z_zmm_zmmm512b32 = 1329,
	Xorpd_xmm_xmmm128 = 1330,
	VEX_Vxorpd_xmm_xmm_xmmm128 = 1331,
	VEX_Vxorpd_ymm_ymm_ymmm256 = 1332,
	EVEX_Vxorpd_xmm_k1z_xmm_xmmm128b64 = 1333,
	EVEX_Vxorpd_ymm_k1z_ymm_ymmm256b64 = 1334,
	EVEX_Vxorpd_zmm_k1z_zmm_zmmm512b64 = 1335,
	Addps_xmm_xmmm128 = 1336,
	VEX_Vaddps_xmm_xmm_xmmm128 = 1337,
	VEX_Vaddps_ymm_ymm_ymmm256 = 1338,
	EVEX_Vaddps_xmm_k1z_xmm_xmmm128b32 = 1339,
	EVEX_Vaddps_ymm_k1z_ymm_ymmm256b32 = 1340,
	EVEX_Vaddps_zmm_k1z_zmm_zmmm512b32_er = 1341,
	Addpd_xmm_xmmm128 = 1342,
	VEX_Vaddpd_xmm_xmm_xmmm128 = 1343,
	VEX_Vaddpd_ymm_ymm_ymmm256 = 1344,
	EVEX_Vaddpd_xmm_k1z_xmm_xmmm128b64 = 1345,
	EVEX_Vaddpd_ymm_k1z_ymm_ymmm256b64 = 1346,
	EVEX_Vaddpd_zmm_k1z_zmm_zmmm512b64_er = 1347,
	Addss_xmm_xmmm32 = 1348,
	VEX_Vaddss_xmm_xmm_xmmm32 = 1349,
	EVEX_Vaddss_xmm_k1z_xmm_xmmm32_er = 1350,
	Addsd_xmm_xmmm64 = 1351,
	VEX_Vaddsd_xmm_xmm_xmmm64 = 1352,
	EVEX_Vaddsd_xmm_k1z_xmm_xmmm64_er = 1353,
	Mulps_xmm_xmmm128 = 1354,
	VEX_Vmulps_xmm_xmm_xmmm128 = 1355,
	VEX_Vmulps_ymm_ymm_ymmm256 = 1356,
	EVEX_Vmulps_xmm_k1z_xmm_xmmm128b32 = 1357,
	EVEX_Vmulps_ymm_k1z_ymm_ymmm256b32 = 1358,
	EVEX_Vmulps_zmm_k1z_zmm_zmmm512b32_er = 1359,
	Mulpd_xmm_xmmm128 = 1360,
	VEX_Vmulpd_xmm_xmm_xmmm128 = 1361,
	VEX_Vmulpd_ymm_ymm_ymmm256 = 1362,
	EVEX_Vmulpd_xmm_k1z_xmm_xmmm128b64 = 1363,
	EVEX_Vmulpd_ymm_k1z_ymm_ymmm256b64 = 1364,
	EVEX_Vmulpd_zmm_k1z_zmm_zmmm512b64_er = 1365,
	Mulss_xmm_xmmm32 = 1366,
	VEX_Vmulss_xmm_xmm_xmmm32 = 1367,
	EVEX_Vmulss_xmm_k1z_xmm_xmmm32_er = 1368,
	Mulsd_xmm_xmmm64 = 1369,
	VEX_Vmulsd_xmm_xmm_xmmm64 = 1370,
	EVEX_Vmulsd_xmm_k1z_xmm_xmmm64_er = 1371,
	Cvtps2pd_xmm_xmmm64 = 1372,
	VEX_Vcvtps2pd_xmm_xmmm64 = 1373,
	VEX_Vcvtps2pd_ymm_xmmm128 = 1374,
	EVEX_Vcvtps2pd_xmm_k1z_xmmm64b32 = 1375,
	EVEX_Vcvtps2pd_ymm_k1z_xmmm128b32 = 1376,
	EVEX_Vcvtps2pd_zmm_k1z_ymmm256b32_sae = 1377,
	Cvtpd2ps_xmm_xmmm128 = 1378,
	VEX_Vcvtpd2ps_xmm_xmmm128 = 1379,
	VEX_Vcvtpd2ps_xmm_ymmm256 = 1380,
	EVEX_Vcvtpd2ps_xmm_k1z_xmmm128b64 = 1381,
	EVEX_Vcvtpd2ps_xmm_k1z_ymmm256b64 = 1382,
	EVEX_Vcvtpd2ps_ymm_k1z_zmmm512b64_er = 1383,
	Cvtss2sd_xmm_xmmm32 = 1384,
	VEX_Vcvtss2sd_xmm_xmm_xmmm32 = 1385,
	EVEX_Vcvtss2sd_xmm_k1z_xmm_xmmm32_sae = 1386,
	Cvtsd2ss_xmm_xmmm64 = 1387,
	VEX_Vcvtsd2ss_xmm_xmm_xmmm64 = 1388,
	EVEX_Vcvtsd2ss_xmm_k1z_xmm_xmmm64_er = 1389,
	Cvtdq2ps_xmm_xmmm128 = 1390,
	VEX_Vcvtdq2ps_xmm_xmmm128 = 1391,
	VEX_Vcvtdq2ps_ymm_ymmm256 = 1392,
	EVEX_Vcvtdq2ps_xmm_k1z_xmmm128b32 = 1393,
	EVEX_Vcvtdq2ps_ymm_k1z_ymmm256b32 = 1394,
	EVEX_Vcvtdq2ps_zmm_k1z_zmmm512b32_er = 1395,
	EVEX_Vcvtqq2ps_xmm_k1z_xmmm128b64 = 1396,
	EVEX_Vcvtqq2ps_xmm_k1z_ymmm256b64 = 1397,
	EVEX_Vcvtqq2ps_ymm_k1z_zmmm512b64_er = 1398,
	Cvtps2dq_xmm_xmmm128 = 1399,
	VEX_Vcvtps2dq_xmm_xmmm128 = 1400,
	VEX_Vcvtps2dq_ymm_ymmm256 = 1401,
	EVEX_Vcvtps2dq_xmm_k1z_xmmm128b32 = 1402,
	EVEX_Vcvtps2dq_ymm_k1z_ymmm256b32 = 1403,
	EVEX_Vcvtps2dq_zmm_k1z_zmmm512b32_er = 1404,
	Cvttps2dq_xmm_xmmm128 = 1405,
	VEX_Vcvttps2dq_xmm_xmmm128 = 1406,
	VEX_Vcvttps2dq_ymm_ymmm256 = 1407,
	EVEX_Vcvttps2dq_xmm_k1z_xmmm128b32 = 1408,
	EVEX_Vcvttps2dq_ymm_k1z_ymmm256b32 = 1409,
	EVEX_Vcvttps2dq_zmm_k1z_zmmm512b32_sae = 1410,
	Subps_xmm_xmmm128 = 1411,
	VEX_Vsubps_xmm_xmm_xmmm128 = 1412,
	VEX_Vsubps_ymm_ymm_ymmm256 = 1413,
	EVEX_Vsubps_xmm_k1z_xmm_xmmm128b32 = 1414,
	EVEX_Vsubps_ymm_k1z_ymm_ymmm256b32 = 1415,
	EVEX_Vsubps_zmm_k1z_zmm_zmmm512b32_er = 1416,
	Subpd_xmm_xmmm128 = 1417,
	VEX_Vsubpd_xmm_xmm_xmmm128 = 1418,
	VEX_Vsubpd_ymm_ymm_ymmm256 = 1419,
	EVEX_Vsubpd_xmm_k1z_xmm_xmmm128b64 = 1420,
	EVEX_Vsubpd_ymm_k1z_ymm_ymmm256b64 = 1421,
	EVEX_Vsubpd_zmm_k1z_zmm_zmmm512b64_er = 1422,
	Subss_xmm_xmmm32 = 1423,
	VEX_Vsubss_xmm_xmm_xmmm32 = 1424,
	EVEX_Vsubss_xmm_k1z_xmm_xmmm32_er = 1425,
	Subsd_xmm_xmmm64 = 1426,
	VEX_Vsubsd_xmm_xmm_xmmm64 = 1427,
	EVEX_Vsubsd_xmm_k1z_xmm_xmmm64_er = 1428,
	Minps_xmm_xmmm128 = 1429,
	VEX_Vminps_xmm_xmm_xmmm128 = 1430,
	VEX_Vminps_ymm_ymm_ymmm256 = 1431,
	EVEX_Vminps_xmm_k1z_xmm_xmmm128b32 = 1432,
	EVEX_Vminps_ymm_k1z_ymm_ymmm256b32 = 1433,
	EVEX_Vminps_zmm_k1z_zmm_zmmm512b32_sae = 1434,
	Minpd_xmm_xmmm128 = 1435,
	VEX_Vminpd_xmm_xmm_xmmm128 = 1436,
	VEX_Vminpd_ymm_ymm_ymmm256 = 1437,
	EVEX_Vminpd_xmm_k1z_xmm_xmmm128b64 = 1438,
	EVEX_Vminpd_ymm_k1z_ymm_ymmm256b64 = 1439,
	EVEX_Vminpd_zmm_k1z_zmm_zmmm512b64_sae = 1440,
	Minss_xmm_xmmm32 = 1441,
	VEX_Vminss_xmm_xmm_xmmm32 = 1442,
	EVEX_Vminss_xmm_k1z_xmm_xmmm32_sae = 1443,
	Minsd_xmm_xmmm64 = 1444,
	VEX_Vminsd_xmm_xmm_xmmm64 = 1445,
	EVEX_Vminsd_xmm_k1z_xmm_xmmm64_sae = 1446,
	Divps_xmm_xmmm128 = 1447,
	VEX_Vdivps_xmm_xmm_xmmm128 = 1448,
	VEX_Vdivps_ymm_ymm_ymmm256 = 1449,
	EVEX_Vdivps_xmm_k1z_xmm_xmmm128b32 = 1450,
	EVEX_Vdivps_ymm_k1z_ymm_ymmm256b32 = 1451,
	EVEX_Vdivps_zmm_k1z_zmm_zmmm512b32_er = 1452,
	Divpd_xmm_xmmm128 = 1453,
	VEX_Vdivpd_xmm_xmm_xmmm128 = 1454,
	VEX_Vdivpd_ymm_ymm_ymmm256 = 1455,
	EVEX_Vdivpd_xmm_k1z_xmm_xmmm128b64 = 1456,
	EVEX_Vdivpd_ymm_k1z_ymm_ymmm256b64 = 1457,
	EVEX_Vdivpd_zmm_k1z_zmm_zmmm512b64_er = 1458,
	Divss_xmm_xmmm32 = 1459,
	VEX_Vdivss_xmm_xmm_xmmm32 = 1460,
	EVEX_Vdivss_xmm_k1z_xmm_xmmm32_er = 1461,
	Divsd_xmm_xmmm64 = 1462,
	VEX_Vdivsd_xmm_xmm_xmmm64 = 1463,
	EVEX_Vdivsd_xmm_k1z_xmm_xmmm64_er = 1464,
	Maxps_xmm_xmmm128 = 1465,
	VEX_Vmaxps_xmm_xmm_xmmm128 = 1466,
	VEX_Vmaxps_ymm_ymm_ymmm256 = 1467,
	EVEX_Vmaxps_xmm_k1z_xmm_xmmm128b32 = 1468,
	EVEX_Vmaxps_ymm_k1z_ymm_ymmm256b32 = 1469,
	EVEX_Vmaxps_zmm_k1z_zmm_zmmm512b32_sae = 1470,
	Maxpd_xmm_xmmm128 = 1471,
	VEX_Vmaxpd_xmm_xmm_xmmm128 = 1472,
	VEX_Vmaxpd_ymm_ymm_ymmm256 = 1473,
	EVEX_Vmaxpd_xmm_k1z_xmm_xmmm128b64 = 1474,
	EVEX_Vmaxpd_ymm_k1z_ymm_ymmm256b64 = 1475,
	EVEX_Vmaxpd_zmm_k1z_zmm_zmmm512b64_sae = 1476,
	Maxss_xmm_xmmm32 = 1477,
	VEX_Vmaxss_xmm_xmm_xmmm32 = 1478,
	EVEX_Vmaxss_xmm_k1z_xmm_xmmm32_sae = 1479,
	Maxsd_xmm_xmmm64 = 1480,
	VEX_Vmaxsd_xmm_xmm_xmmm64 = 1481,
	EVEX_Vmaxsd_xmm_k1z_xmm_xmmm64_sae = 1482,
	Punpcklbw_mm_mmm32 = 1483,
	Punpcklbw_xmm_xmmm128 = 1484,
	VEX_Vpunpcklbw_xmm_xmm_xmmm128 = 1485,
	VEX_Vpunpcklbw_ymm_ymm_ymmm256 = 1486,
	EVEX_Vpunpcklbw_xmm_k1z_xmm_xmmm128 = 1487,
	EVEX_Vpunpcklbw_ymm_k1z_ymm_ymmm256 = 1488,
	EVEX_Vpunpcklbw_zmm_k1z_zmm_zmmm512 = 1489,
	Punpcklwd_mm_mmm32 = 1490,
	Punpcklwd_xmm_xmmm128 = 1491,
	VEX_Vpunpcklwd_xmm_xmm_xmmm128 = 1492,
	VEX_Vpunpcklwd_ymm_ymm_ymmm256 = 1493,
	EVEX_Vpunpcklwd_xmm_k1z_xmm_xmmm128 = 1494,
	EVEX_Vpunpcklwd_ymm_k1z_ymm_ymmm256 = 1495,
	EVEX_Vpunpcklwd_zmm_k1z_zmm_zmmm512 = 1496,
	Punpckldq_mm_mmm32 = 1497,
	Punpckldq_xmm_xmmm128 = 1498,
	VEX_Vpunpckldq_xmm_xmm_xmmm128 = 1499,
	VEX_Vpunpckldq_ymm_ymm_ymmm256 = 1500,
	EVEX_Vpunpckldq_xmm_k1z_xmm_xmmm128b32 = 1501,
	EVEX_Vpunpckldq_ymm_k1z_ymm_ymmm256b32 = 1502,
	EVEX_Vpunpckldq_zmm_k1z_zmm_zmmm512b32 = 1503,
	Packsswb_mm_mmm64 = 1504,
	Packsswb_xmm_xmmm128 = 1505,
	VEX_Vpacksswb_xmm_xmm_xmmm128 = 1506,
	VEX_Vpacksswb_ymm_ymm_ymmm256 = 1507,
	EVEX_Vpacksswb_xmm_k1z_xmm_xmmm128 = 1508,
	EVEX_Vpacksswb_ymm_k1z_ymm_ymmm256 = 1509,
	EVEX_Vpacksswb_zmm_k1z_zmm_zmmm512 = 1510,
	Pcmpgtb_mm_mmm64 = 1511,
	Pcmpgtb_xmm_xmmm128 = 1512,
	VEX_Vpcmpgtb_xmm_xmm_xmmm128 = 1513,
	VEX_Vpcmpgtb_ymm_ymm_ymmm256 = 1514,
	EVEX_Vpcmpgtb_k_k1_xmm_xmmm128 = 1515,
	EVEX_Vpcmpgtb_k_k1_ymm_ymmm256 = 1516,
	EVEX_Vpcmpgtb_k_k1_zmm_zmmm512 = 1517,
	Pcmpgtw_mm_mmm64 = 1518,
	Pcmpgtw_xmm_xmmm128 = 1519,
	VEX_Vpcmpgtw_xmm_xmm_xmmm128 = 1520,
	VEX_Vpcmpgtw_ymm_ymm_ymmm256 = 1521,
	EVEX_Vpcmpgtw_k_k1_xmm_xmmm128 = 1522,
	EVEX_Vpcmpgtw_k_k1_ymm_ymmm256 = 1523,
	EVEX_Vpcmpgtw_k_k1_zmm_zmmm512 = 1524,
	Pcmpgtd_mm_mmm64 = 1525,
	Pcmpgtd_xmm_xmmm128 = 1526,
	VEX_Vpcmpgtd_xmm_xmm_xmmm128 = 1527,
	VEX_Vpcmpgtd_ymm_ymm_ymmm256 = 1528,
	EVEX_Vpcmpgtd_k_k1_xmm_xmmm128b32 = 1529,
	EVEX_Vpcmpgtd_k_k1_ymm_ymmm256b32 = 1530,
	EVEX_Vpcmpgtd_k_k1_zmm_zmmm512b32 = 1531,
	Packuswb_mm_mmm64 = 1532,
	Packuswb_xmm_xmmm128 = 1533,
	VEX_Vpackuswb_xmm_xmm_xmmm128 = 1534,
	VEX_Vpackuswb_ymm_ymm_ymmm256 = 1535,
	EVEX_Vpackuswb_xmm_k1z_xmm_xmmm128 = 1536,
	EVEX_Vpackuswb_ymm_k1z_ymm_ymmm256 = 1537,
	EVEX_Vpackuswb_zmm_k1z_zmm_zmmm512 = 1538,
	Punpckhbw_mm_mmm64 = 1539,
	Punpckhbw_xmm_xmmm128 = 1540,
	VEX_Vpunpckhbw_xmm_xmm_xmmm128 = 1541,
	VEX_Vpunpckhbw_ymm_ymm_ymmm256 = 1542,
	EVEX_Vpunpckhbw_xmm_k1z_xmm_xmmm128 = 1543,
	EVEX_Vpunpckhbw_ymm_k1z_ymm_ymmm256 = 1544,
	EVEX_Vpunpckhbw_zmm_k1z_zmm_zmmm512 = 1545,
	Punpckhwd_mm_mmm64 = 1546,
	Punpckhwd_xmm_xmmm128 = 1547,
	VEX_Vpunpckhwd_xmm_xmm_xmmm128 = 1548,
	VEX_Vpunpckhwd_ymm_ymm_ymmm256 = 1549,
	EVEX_Vpunpckhwd_xmm_k1z_xmm_xmmm128 = 1550,
	EVEX_Vpunpckhwd_ymm_k1z_ymm_ymmm256 = 1551,
	EVEX_Vpunpckhwd_zmm_k1z_zmm_zmmm512 = 1552,
	Punpckhdq_mm_mmm64 = 1553,
	Punpckhdq_xmm_xmmm128 = 1554,
	VEX_Vpunpckhdq_xmm_xmm_xmmm128 = 1555,
	VEX_Vpunpckhdq_ymm_ymm_ymmm256 = 1556,
	EVEX_Vpunpckhdq_xmm_k1z_xmm_xmmm128b32 = 1557,
	EVEX_Vpunpckhdq_ymm_k1z_ymm_ymmm256b32 = 1558,
	EVEX_Vpunpckhdq_zmm_k1z_zmm_zmmm512b32 = 1559,
	Packssdw_mm_mmm64 = 1560,
	Packssdw_xmm_xmmm128 = 1561,
	VEX_Vpackssdw_xmm_xmm_xmmm128 = 1562,
	VEX_Vpackssdw_ymm_ymm_ymmm256 = 1563,
	EVEX_Vpackssdw_xmm_k1z_xmm_xmmm128b32 = 1564,
	EVEX_Vpackssdw_ymm_k1z_ymm_ymmm256b32 = 1565,
	EVEX_Vpackssdw_zmm_k1z_zmm_zmmm512b32 = 1566,
	Punpcklqdq_xmm_xmmm128 = 1567,
	VEX_Vpunpcklqdq_xmm_xmm_xmmm128 = 1568,
	VEX_Vpunpcklqdq_ymm_ymm_ymmm256 = 1569,
	EVEX_Vpunpcklqdq_xmm_k1z_xmm_xmmm128b64 = 1570,
	EVEX_Vpunpcklqdq_ymm_k1z_ymm_ymmm256b64 = 1571,
	EVEX_Vpunpcklqdq_zmm_k1z_zmm_zmmm512b64 = 1572,
	Punpckhqdq_xmm_xmmm128 = 1573,
	VEX_Vpunpckhqdq_xmm_xmm_xmmm128 = 1574,
	VEX_Vpunpckhqdq_ymm_ymm_ymmm256 = 1575,
	EVEX_Vpunpckhqdq_xmm_k1z_xmm_xmmm128b64 = 1576,
	EVEX_Vpunpckhqdq_ymm_k1z_ymm_ymmm256b64 = 1577,
	EVEX_Vpunpckhqdq_zmm_k1z_zmm_zmmm512b64 = 1578,
	Movd_mm_rm32 = 1579,
	Movq_mm_rm64 = 1580,
	Movd_xmm_rm32 = 1581,
	Movq_xmm_rm64 = 1582,
	VEX_Vmovd_xmm_rm32 = 1583,
	VEX_Vmovq_xmm_rm64 = 1584,
	EVEX_Vmovd_xmm_rm32 = 1585,
	EVEX_Vmovq_xmm_rm64 = 1586,
	Movq_mm_mmm64 = 1587,
	Movdqa_xmm_xmmm128 = 1588,
	VEX_Vmovdqa_xmm_xmmm128 = 1589,
	VEX_Vmovdqa_ymm_ymmm256 = 1590,
	EVEX_Vmovdqa32_xmm_k1z_xmmm128 = 1591,
	EVEX_Vmovdqa32_ymm_k1z_ymmm256 = 1592,
	EVEX_Vmovdqa32_zmm_k1z_zmmm512 = 1593,
	EVEX_Vmovdqa64_xmm_k1z_xmmm128 = 1594,
	EVEX_Vmovdqa64_ymm_k1z_ymmm256 = 1595,
	EVEX_Vmovdqa64_zmm_k1z_zmmm512 = 1596,
	Movdqu_xmm_xmmm128 = 1597,
	VEX_Vmovdqu_xmm_xmmm128 = 1598,
	VEX_Vmovdqu_ymm_ymmm256 = 1599,
	EVEX_Vmovdqu32_xmm_k1z_xmmm128 = 1600,
	EVEX_Vmovdqu32_ymm_k1z_ymmm256 = 1601,
	EVEX_Vmovdqu32_zmm_k1z_zmmm512 = 1602,
	EVEX_Vmovdqu64_xmm_k1z_xmmm128 = 1603,
	EVEX_Vmovdqu64_ymm_k1z_ymmm256 = 1604,
	EVEX_Vmovdqu64_zmm_k1z_zmmm512 = 1605,
	EVEX_Vmovdqu8_xmm_k1z_xmmm128 = 1606,
	EVEX_Vmovdqu8_ymm_k1z_ymmm256 = 1607,
	EVEX_Vmovdqu8_zmm_k1z_zmmm512 = 1608,
	EVEX_Vmovdqu16_xmm_k1z_xmmm128 = 1609,
	EVEX_Vmovdqu16_ymm_k1z_ymmm256 = 1610,
	EVEX_Vmovdqu16_zmm_k1z_zmmm512 = 1611,
	Pshufw_mm_mmm64_imm8 = 1612,
	Pshufd_xmm_xmmm128_imm8 = 1613,
	VEX_Vpshufd_xmm_xmmm128_imm8 = 1614,
	VEX_Vpshufd_ymm_ymmm256_imm8 = 1615,
	EVEX_Vpshufd_xmm_k1z_xmmm128b32_imm8 = 1616,
	EVEX_Vpshufd_ymm_k1z_ymmm256b32_imm8 = 1617,
	EVEX_Vpshufd_zmm_k1z_zmmm512b32_imm8 = 1618,
	Pshufhw_xmm_xmmm128_imm8 = 1619,
	VEX_Vpshufhw_xmm_xmmm128_imm8 = 1620,
	VEX_Vpshufhw_ymm_ymmm256_imm8 = 1621,
	EVEX_Vpshufhw_xmm_k1z_xmmm128_imm8 = 1622,
	EVEX_Vpshufhw_ymm_k1z_ymmm256_imm8 = 1623,
	EVEX_Vpshufhw_zmm_k1z_zmmm512_imm8 = 1624,
	Pshuflw_xmm_xmmm128_imm8 = 1625,
	VEX_Vpshuflw_xmm_xmmm128_imm8 = 1626,
	VEX_Vpshuflw_ymm_ymmm256_imm8 = 1627,
	EVEX_Vpshuflw_xmm_k1z_xmmm128_imm8 = 1628,
	EVEX_Vpshuflw_ymm_k1z_ymmm256_imm8 = 1629,
	EVEX_Vpshuflw_zmm_k1z_zmmm512_imm8 = 1630,
	Psrlw_mm_imm8 = 1631,
	Psrlw_xmm_imm8 = 1632,
	VEX_Vpsrlw_xmm_xmm_imm8 = 1633,
	VEX_Vpsrlw_ymm_ymm_imm8 = 1634,
	EVEX_Vpsrlw_xmm_k1z_xmmm128_imm8 = 1635,
	EVEX_Vpsrlw_ymm_k1z_ymmm256_imm8 = 1636,
	EVEX_Vpsrlw_zmm_k1z_zmmm512_imm8 = 1637,
	Psraw_mm_imm8 = 1638,
	Psraw_xmm_imm8 = 1639,
	VEX_Vpsraw_xmm_xmm_imm8 = 1640,
	VEX_Vpsraw_ymm_ymm_imm8 = 1641,
	EVEX_Vpsraw_xmm_k1z_xmmm128_imm8 = 1642,
	EVEX_Vpsraw_ymm_k1z_ymmm256_imm8 = 1643,
	EVEX_Vpsraw_zmm_k1z_zmmm512_imm8 = 1644,
	Psllw_mm_imm8 = 1645,
	Psllw_xmm_imm8 = 1646,
	VEX_Vpsllw_xmm_xmm_imm8 = 1647,
	VEX_Vpsllw_ymm_ymm_imm8 = 1648,
	EVEX_Vpsllw_xmm_k1z_xmmm128_imm8 = 1649,
	EVEX_Vpsllw_ymm_k1z_ymmm256_imm8 = 1650,
	EVEX_Vpsllw_zmm_k1z_zmmm512_imm8 = 1651,
	EVEX_Vprord_xmm_k1z_xmmm128b32_imm8 = 1652,
	EVEX_Vprord_ymm_k1z_ymmm256b32_imm8 = 1653,
	EVEX_Vprord_zmm_k1z_zmmm512b32_imm8 = 1654,
	EVEX_Vprorq_xmm_k1z_xmmm128b64_imm8 = 1655,
	EVEX_Vprorq_ymm_k1z_ymmm256b64_imm8 = 1656,
	EVEX_Vprorq_zmm_k1z_zmmm512b64_imm8 = 1657,
	EVEX_Vprold_xmm_k1z_xmmm128b32_imm8 = 1658,
	EVEX_Vprold_ymm_k1z_ymmm256b32_imm8 = 1659,
	EVEX_Vprold_zmm_k1z_zmmm512b32_imm8 = 1660,
	EVEX_Vprolq_xmm_k1z_xmmm128b64_imm8 = 1661,
	EVEX_Vprolq_ymm_k1z_ymmm256b64_imm8 = 1662,
	EVEX_Vprolq_zmm_k1z_zmmm512b64_imm8 = 1663,
	Psrld_mm_imm8 = 1664,
	Psrld_xmm_imm8 = 1665,
	VEX_Vpsrld_xmm_xmm_imm8 = 1666,
	VEX_Vpsrld_ymm_ymm_imm8 = 1667,
	EVEX_Vpsrld_xmm_k1z_xmmm128b32_imm8 = 1668,
	EVEX_Vpsrld_ymm_k1z_ymmm256b32_imm8 = 1669,
	EVEX_Vpsrld_zmm_k1z_zmmm512b32_imm8 = 1670,
	Psrad_mm_imm8 = 1671,
	Psrad_xmm_imm8 = 1672,
	VEX_Vpsrad_xmm_xmm_imm8 = 1673,
	VEX_Vpsrad_ymm_ymm_imm8 = 1674,
	EVEX_Vpsrad_xmm_k1z_xmmm128b32_imm8 = 1675,
	EVEX_Vpsrad_ymm_k1z_ymmm256b32_imm8 = 1676,
	EVEX_Vpsrad_zmm_k1z_zmmm512b32_imm8 = 1677,
	EVEX_Vpsraq_xmm_k1z_xmmm128b64_imm8 = 1678,
	EVEX_Vpsraq_ymm_k1z_ymmm256b64_imm8 = 1679,
	EVEX_Vpsraq_zmm_k1z_zmmm512b64_imm8 = 1680,
	Pslld_mm_imm8 = 1681,
	Pslld_xmm_imm8 = 1682,
	VEX_Vpslld_xmm_xmm_imm8 = 1683,
	VEX_Vpslld_ymm_ymm_imm8 = 1684,
	EVEX_Vpslld_xmm_k1z_xmmm128b32_imm8 = 1685,
	EVEX_Vpslld_ymm_k1z_ymmm256b32_imm8 = 1686,
	EVEX_Vpslld_zmm_k1z_zmmm512b32_imm8 = 1687,
	Psrlq_mm_imm8 = 1688,
	Psrlq_xmm_imm8 = 1689,
	VEX_Vpsrlq_xmm_xmm_imm8 = 1690,
	VEX_Vpsrlq_ymm_ymm_imm8 = 1691,
	EVEX_Vpsrlq_xmm_k1z_xmmm128b64_imm8 = 1692,
	EVEX_Vpsrlq_ymm_k1z_ymmm256b64_imm8 = 1693,
	EVEX_Vpsrlq_zmm_k1z_zmmm512b64_imm8 = 1694,
	Psrldq_xmm_imm8 = 1695,
	VEX_Vpsrldq_xmm_xmm_imm8 = 1696,
	VEX_Vpsrldq_ymm_ymm_imm8 = 1697,
	EVEX_Vpsrldq_xmm_xmmm128_imm8 = 1698,
	EVEX_Vpsrldq_ymm_ymmm256_imm8 = 1699,
	EVEX_Vpsrldq_zmm_zmmm512_imm8 = 1700,
	Psllq_mm_imm8 = 1701,
	Psllq_xmm_imm8 = 1702,
	VEX_Vpsllq_xmm_xmm_imm8 = 1703,
	VEX_Vpsllq_ymm_ymm_imm8 = 1704,
	EVEX_Vpsllq_xmm_k1z_xmmm128b64_imm8 = 1705,
	EVEX_Vpsllq_ymm_k1z_ymmm256b64_imm8 = 1706,
	EVEX_Vpsllq_zmm_k1z_zmmm512b64_imm8 = 1707,
	Pslldq_xmm_imm8 = 1708,
	VEX_Vpslldq_xmm_xmm_imm8 = 1709,
	VEX_Vpslldq_ymm_ymm_imm8 = 1710,
	EVEX_Vpslldq_xmm_xmmm128_imm8 = 1711,
	EVEX_Vpslldq_ymm_ymmm256_imm8 = 1712,
	EVEX_Vpslldq_zmm_zmmm512_imm8 = 1713,
	Pcmpeqb_mm_mmm64 = 1714,
	Pcmpeqb_xmm_xmmm128 = 1715,
	VEX_Vpcmpeqb_xmm_xmm_xmmm128 = 1716,
	VEX_Vpcmpeqb_ymm_ymm_ymmm256 = 1717,
	EVEX_Vpcmpeqb_k_k1_xmm_xmmm128 = 1718,
	EVEX_Vpcmpeqb_k_k1_ymm_ymmm256 = 1719,
	EVEX_Vpcmpeqb_k_k1_zmm_zmmm512 = 1720,
	Pcmpeqw_mm_mmm64 = 1721,
	Pcmpeqw_xmm_xmmm128 = 1722,
	VEX_Vpcmpeqw_xmm_xmm_xmmm128 = 1723,
	VEX_Vpcmpeqw_ymm_ymm_ymmm256 = 1724,
	EVEX_Vpcmpeqw_k_k1_xmm_xmmm128 = 1725,
	EVEX_Vpcmpeqw_k_k1_ymm_ymmm256 = 1726,
	EVEX_Vpcmpeqw_k_k1_zmm_zmmm512 = 1727,
	Pcmpeqd_mm_mmm64 = 1728,
	Pcmpeqd_xmm_xmmm128 = 1729,
	VEX_Vpcmpeqd_xmm_xmm_xmmm128 = 1730,
	VEX_Vpcmpeqd_ymm_ymm_ymmm256 = 1731,
	EVEX_Vpcmpeqd_k_k1_xmm_xmmm128b32 = 1732,
	EVEX_Vpcmpeqd_k_k1_ymm_ymmm256b32 = 1733,
	EVEX_Vpcmpeqd_k_k1_zmm_zmmm512b32 = 1734,
	Emms = 1735,
	VEX_Vzeroupper = 1736,
	VEX_Vzeroall = 1737,
	Vmread_rm32_r32 = 1738,
	Vmread_rm64_r64 = 1739,
	EVEX_Vcvttps2udq_xmm_k1z_xmmm128b32 = 1740,
	EVEX_Vcvttps2udq_ymm_k1z_ymmm256b32 = 1741,
	EVEX_Vcvttps2udq_zmm_k1z_zmmm512b32_sae = 1742,
	EVEX_Vcvttpd2udq_xmm_k1z_xmmm128b64 = 1743,
	EVEX_Vcvttpd2udq_xmm_k1z_ymmm256b64 = 1744,
	EVEX_Vcvttpd2udq_ymm_k1z_zmmm512b64_sae = 1745,
	Extrq_xmm_imm8_imm8 = 1746,
	EVEX_Vcvttps2uqq_xmm_k1z_xmmm64b32 = 1747,
	EVEX_Vcvttps2uqq_ymm_k1z_xmmm128b32 = 1748,
	EVEX_Vcvttps2uqq_zmm_k1z_ymmm256b32_sae = 1749,
	EVEX_Vcvttpd2uqq_xmm_k1z_xmmm128b64 = 1750,
	EVEX_Vcvttpd2uqq_ymm_k1z_ymmm256b64 = 1751,
	EVEX_Vcvttpd2uqq_zmm_k1z_zmmm512b64_sae = 1752,
	EVEX_Vcvttss2usi_r32_xmmm32_sae = 1753,
	EVEX_Vcvttss2usi_r64_xmmm32_sae = 1754,
	Insertq_xmm_xmm_imm8_imm8 = 1755,
	EVEX_Vcvttsd2usi_r32_xmmm64_sae = 1756,
	EVEX_Vcvttsd2usi_r64_xmmm64_sae = 1757,
	Vmwrite_r32_rm32 = 1758,
	Vmwrite_r64_rm64 = 1759,
	EVEX_Vcvtps2udq_xmm_k1z_xmmm128b32 = 1760,
	EVEX_Vcvtps2udq_ymm_k1z_ymmm256b32 = 1761,
	EVEX_Vcvtps2udq_zmm_k1z_zmmm512b32_er = 1762,
	EVEX_Vcvtpd2udq_xmm_k1z_xmmm128b64 = 1763,
	EVEX_Vcvtpd2udq_xmm_k1z_ymmm256b64 = 1764,
	EVEX_Vcvtpd2udq_ymm_k1z_zmmm512b64_er = 1765,
	Extrq_xmm_xmm = 1766,
	EVEX_Vcvtps2uqq_xmm_k1z_xmmm64b32 = 1767,
	EVEX_Vcvtps2uqq_ymm_k1z_xmmm128b32 = 1768,
	EVEX_Vcvtps2uqq_zmm_k1z_ymmm256b32_er = 1769,
	EVEX_Vcvtpd2uqq_xmm_k1z_xmmm128b64 = 1770,
	EVEX_Vcvtpd2uqq_ymm_k1z_ymmm256b64 = 1771,
	EVEX_Vcvtpd2uqq_zmm_k1z_zmmm512b64_er = 1772,
	EVEX_Vcvtss2usi_r32_xmmm32_er = 1773,
	EVEX_Vcvtss2usi_r64_xmmm32_er = 1774,
	Insertq_xmm_xmm = 1775,
	EVEX_Vcvtsd2usi_r32_xmmm64_er = 1776,
	EVEX_Vcvtsd2usi_r64_xmmm64_er = 1777,
	EVEX_Vcvttps2qq_xmm_k1z_xmmm64b32 = 1778,
	EVEX_Vcvttps2qq_ymm_k1z_xmmm128b32 = 1779,
	EVEX_Vcvttps2qq_zmm_k1z_ymmm256b32_sae = 1780,
	EVEX_Vcvttpd2qq_xmm_k1z_xmmm128b64 = 1781,
	EVEX_Vcvttpd2qq_ymm_k1z_ymmm256b64 = 1782,
	EVEX_Vcvttpd2qq_zmm_k1z_zmmm512b64_sae = 1783,
	EVEX_Vcvtudq2pd_xmm_k1z_xmmm64b32 = 1784,
	EVEX_Vcvtudq2pd_ymm_k1z_xmmm128b32 = 1785,
	EVEX_Vcvtudq2pd_zmm_k1z_ymmm256b32 = 1786,
	EVEX_Vcvtuqq2pd_xmm_k1z_xmmm128b64 = 1787,
	EVEX_Vcvtuqq2pd_ymm_k1z_ymmm256b64 = 1788,
	EVEX_Vcvtuqq2pd_zmm_k1z_zmmm512b64_er = 1789,
	EVEX_Vcvtudq2ps_xmm_k1z_xmmm128b32 = 1790,
	EVEX_Vcvtudq2ps_ymm_k1z_ymmm256b32 = 1791,
	EVEX_Vcvtudq2ps_zmm_k1z_zmmm512b32_er = 1792,
	EVEX_Vcvtuqq2ps_xmm_k1z_xmmm128b64 = 1793,
	EVEX_Vcvtuqq2ps_xmm_k1z_ymmm256b64 = 1794,
	EVEX_Vcvtuqq2ps_ymm_k1z_zmmm512b64_er = 1795,
	EVEX_Vcvtps2qq_xmm_k1z_xmmm64b32 = 1796,
	EVEX_Vcvtps2qq_ymm_k1z_xmmm128b32 = 1797,
	EVEX_Vcvtps2qq_zmm_k1z_ymmm256b32_er = 1798,
	EVEX_Vcvtpd2qq_xmm_k1z_xmmm128b64 = 1799,
	EVEX_Vcvtpd2qq_ymm_k1z_ymmm256b64 = 1800,
	EVEX_Vcvtpd2qq_zmm_k1z_zmmm512b64_er = 1801,
	EVEX_Vcvtusi2ss_xmm_xmm_rm32_er = 1802,
	EVEX_Vcvtusi2ss_xmm_xmm_rm64_er = 1803,
	EVEX_Vcvtusi2sd_xmm_xmm_rm32_er = 1804,
	EVEX_Vcvtusi2sd_xmm_xmm_rm64_er = 1805,
	Haddpd_xmm_xmmm128 = 1806,
	VEX_Vhaddpd_xmm_xmm_xmmm128 = 1807,
	VEX_Vhaddpd_ymm_ymm_ymmm256 = 1808,
	Haddps_xmm_xmmm128 = 1809,
	VEX_Vhaddps_xmm_xmm_xmmm128 = 1810,
	VEX_Vhaddps_ymm_ymm_ymmm256 = 1811,
	Hsubpd_xmm_xmmm128 = 1812,
	VEX_Vhsubpd_xmm_xmm_xmmm128 = 1813,
	VEX_Vhsubpd_ymm_ymm_ymmm256 = 1814,
	Hsubps_xmm_xmmm128 = 1815,
	VEX_Vhsubps_xmm_xmm_xmmm128 = 1816,
	VEX_Vhsubps_ymm_ymm_ymmm256 = 1817,
	Movd_rm32_mm = 1818,
	Movq_rm64_mm = 1819,
	Movd_rm32_xmm = 1820,
	Movq_rm64_xmm = 1821,
	VEX_Vmovd_rm32_xmm = 1822,
	VEX_Vmovq_rm64_xmm = 1823,
	EVEX_Vmovd_rm32_xmm = 1824,
	EVEX_Vmovq_rm64_xmm = 1825,
	Movq_xmm_xmmm64 = 1826,
	VEX_Vmovq_xmm_xmmm64 = 1827,
	EVEX_Vmovq_xmm_xmmm64 = 1828,
	Movq_mmm64_mm = 1829,
	Movdqa_xmmm128_xmm = 1830,
	VEX_Vmovdqa_xmmm128_xmm = 1831,
	VEX_Vmovdqa_ymmm256_ymm = 1832,
	EVEX_Vmovdqa32_xmmm128_k1z_xmm = 1833,
	EVEX_Vmovdqa32_ymmm256_k1z_ymm = 1834,
	EVEX_Vmovdqa32_zmmm512_k1z_zmm = 1835,
	EVEX_Vmovdqa64_xmmm128_k1z_xmm = 1836,
	EVEX_Vmovdqa64_ymmm256_k1z_ymm = 1837,
	EVEX_Vmovdqa64_zmmm512_k1z_zmm = 1838,
	Movdqu_xmmm128_xmm = 1839,
	VEX_Vmovdqu_xmmm128_xmm = 1840,
	VEX_Vmovdqu_ymmm256_ymm = 1841,
	EVEX_Vmovdqu32_xmmm128_k1z_xmm = 1842,
	EVEX_Vmovdqu32_ymmm256_k1z_ymm = 1843,
	EVEX_Vmovdqu32_zmmm512_k1z_zmm = 1844,
	EVEX_Vmovdqu64_xmmm128_k1z_xmm = 1845,
	EVEX_Vmovdqu64_ymmm256_k1z_ymm = 1846,
	EVEX_Vmovdqu64_zmmm512_k1z_zmm = 1847,
	EVEX_Vmovdqu8_xmmm128_k1z_xmm = 1848,
	EVEX_Vmovdqu8_ymmm256_k1z_ymm = 1849,
	EVEX_Vmovdqu8_zmmm512_k1z_zmm = 1850,
	EVEX_Vmovdqu16_xmmm128_k1z_xmm = 1851,
	EVEX_Vmovdqu16_ymmm256_k1z_ymm = 1852,
	EVEX_Vmovdqu16_zmmm512_k1z_zmm = 1853,
	Jo_rel16 = 1854,
	Jo_rel32_32 = 1855,
	Jo_rel32_64 = 1856,
	Jno_rel16 = 1857,
	Jno_rel32_32 = 1858,
	Jno_rel32_64 = 1859,
	Jb_rel16 = 1860,
	Jb_rel32_32 = 1861,
	Jb_rel32_64 = 1862,
	Jae_rel16 = 1863,
	Jae_rel32_32 = 1864,
	Jae_rel32_64 = 1865,
	Je_rel16 = 1866,
	Je_rel32_32 = 1867,
	Je_rel32_64 = 1868,
	Jne_rel16 = 1869,
	Jne_rel32_32 = 1870,
	Jne_rel32_64 = 1871,
	Jbe_rel16 = 1872,
	Jbe_rel32_32 = 1873,
	Jbe_rel32_64 = 1874,
	Ja_rel16 = 1875,
	Ja_rel32_32 = 1876,
	Ja_rel32_64 = 1877,
	Js_rel16 = 1878,
	Js_rel32_32 = 1879,
	Js_rel32_64 = 1880,
	Jns_rel16 = 1881,
	Jns_rel32_32 = 1882,
	Jns_rel32_64 = 1883,
	Jp_rel16 = 1884,
	Jp_rel32_32 = 1885,
	Jp_rel32_64 = 1886,
	Jnp_rel16 = 1887,
	Jnp_rel32_32 = 1888,
	Jnp_rel32_64 = 1889,
	Jl_rel16 = 1890,
	Jl_rel32_32 = 1891,
	Jl_rel32_64 = 1892,
	Jge_rel16 = 1893,
	Jge_rel32_32 = 1894,
	Jge_rel32_64 = 1895,
	Jle_rel16 = 1896,
	Jle_rel32_32 = 1897,
	Jle_rel32_64 = 1898,
	Jg_rel16 = 1899,
	Jg_rel32_32 = 1900,
	Jg_rel32_64 = 1901,
	Seto_rm8 = 1902,
	Setno_rm8 = 1903,
	Setb_rm8 = 1904,
	Setae_rm8 = 1905,
	Sete_rm8 = 1906,
	Setne_rm8 = 1907,
	Setbe_rm8 = 1908,
	Seta_rm8 = 1909,
	Sets_rm8 = 1910,
	Setns_rm8 = 1911,
	Setp_rm8 = 1912,
	Setnp_rm8 = 1913,
	Setl_rm8 = 1914,
	Setge_rm8 = 1915,
	Setle_rm8 = 1916,
	Setg_rm8 = 1917,
	VEX_Kmovw_k_km16 = 1918,
	VEX_Kmovq_k_km64 = 1919,
	VEX_Kmovb_k_km8 = 1920,
	VEX_Kmovd_k_km32 = 1921,
	VEX_Kmovw_m16_k = 1922,
	VEX_Kmovq_m64_k = 1923,
	VEX_Kmovb_m8_k = 1924,
	VEX_Kmovd_m32_k = 1925,
	VEX_Kmovw_k_r32 = 1926,
	VEX_Kmovb_k_r32 = 1927,
	VEX_Kmovd_k_r32 = 1928,
	VEX_Kmovq_k_r64 = 1929,
	VEX_Kmovw_r32_k = 1930,
	VEX_Kmovb_r32_k = 1931,
	VEX_Kmovd_r32_k = 1932,
	VEX_Kmovq_r64_k = 1933,
	VEX_Kortestw_k_k = 1934,
	VEX_Kortestq_k_k = 1935,
	VEX_Kortestb_k_k = 1936,
	VEX_Kortestd_k_k = 1937,
	VEX_Ktestw_k_k = 1938,
	VEX_Ktestq_k_k = 1939,
	VEX_Ktestb_k_k = 1940,
	VEX_Ktestd_k_k = 1941,
	Pushw_FS = 1942,
	Pushd_FS = 1943,
	Pushq_FS = 1944,
	Popw_FS = 1945,
	Popd_FS = 1946,
	Popq_FS = 1947,
	Cpuid = 1948,
	Bt_rm16_r16 = 1949,
	Bt_rm32_r32 = 1950,
	Bt_rm64_r64 = 1951,
	Shld_rm16_r16_imm8 = 1952,
	Shld_rm32_r32_imm8 = 1953,
	Shld_rm64_r64_imm8 = 1954,
	Shld_rm16_r16_CL = 1955,
	Shld_rm32_r32_CL = 1956,
	Shld_rm64_r64_CL = 1957,
	Montmul_16 = 1958,
	Montmul_32 = 1959,
	Montmul_64 = 1960,
	Xsha1_16 = 1961,
	Xsha1_32 = 1962,
	Xsha1_64 = 1963,
	Xsha256_16 = 1964,
	Xsha256_32 = 1965,
	Xsha256_64 = 1966,
	Xbts_r16_rm16 = 1967,
	Xbts_r32_rm32 = 1968,
	Xstore_16 = 1969,
	Xstore_32 = 1970,
	Xstore_64 = 1971,
	XcryptEcb_16 = 1972,
	XcryptEcb_32 = 1973,
	XcryptEcb_64 = 1974,
	XcryptCbc_16 = 1975,
	XcryptCbc_32 = 1976,
	XcryptCbc_64 = 1977,
	XcryptCtr_16 = 1978,
	XcryptCtr_32 = 1979,
	XcryptCtr_64 = 1980,
	XcryptCfb_16 = 1981,
	XcryptCfb_32 = 1982,
	XcryptCfb_64 = 1983,
	XcryptOfb_16 = 1984,
	XcryptOfb_32 = 1985,
	XcryptOfb_64 = 1986,
	Ibts_rm16_r16 = 1987,
	Ibts_rm32_r32 = 1988,
	Cmpxchg486_rm8_r8 = 1989,
	Cmpxchg486_rm16_r16 = 1990,
	Cmpxchg486_rm32_r32 = 1991,
	Pushw_GS = 1992,
	Pushd_GS = 1993,
	Pushq_GS = 1994,
	Popw_GS = 1995,
	Popd_GS = 1996,
	Popq_GS = 1997,
	Rsm = 1998,
	Bts_rm16_r16 = 1999,
	Bts_rm32_r32 = 2000,
	Bts_rm64_r64 = 2001,
	Shrd_rm16_r16_imm8 = 2002,
	Shrd_rm32_r32_imm8 = 2003,
	Shrd_rm64_r64_imm8 = 2004,
	Shrd_rm16_r16_CL = 2005,
	Shrd_rm32_r32_CL = 2006,
	Shrd_rm64_r64_CL = 2007,
	Fxsave_m512byte = 2008,
	Fxsave64_m512byte = 2009,
	Rdfsbase_r32 = 2010,
	Rdfsbase_r64 = 2011,
	Fxrstor_m512byte = 2012,
	Fxrstor64_m512byte = 2013,
	Rdgsbase_r32 = 2014,
	Rdgsbase_r64 = 2015,
	Ldmxcsr_m32 = 2016,
	Wrfsbase_r32 = 2017,
	Wrfsbase_r64 = 2018,
	VEX_Vldmxcsr_m32 = 2019,
	Stmxcsr_m32 = 2020,
	Wrgsbase_r32 = 2021,
	Wrgsbase_r64 = 2022,
	VEX_Vstmxcsr_m32 = 2023,
	Xsave_mem = 2024,
	Xsave64_mem = 2025,
	Ptwrite_rm32 = 2026,
	Ptwrite_rm64 = 2027,
	Xrstor_mem = 2028,
	Xrstor64_mem = 2029,
	Incsspd_r32 = 2030,
	Incsspq_r64 = 2031,
	Xsaveopt_mem = 2032,
	Xsaveopt64_mem = 2033,
	Clwb_m8 = 2034,
	Tpause_r32 = 2035,
	Tpause_r64 = 2036,
	Clrssbsy_m64 = 2037,
	Umonitor_r16 = 2038,
	Umonitor_r32 = 2039,
	Umonitor_r64 = 2040,
	Umwait_r32 = 2041,
	Umwait_r64 = 2042,
	Clflush_m8 = 2043,
	Clflushopt_m8 = 2044,
	Lfence = 2045,
	Lfence_E9 = 2046,
	Lfence_EA = 2047,
	Lfence_EB = 2048,
	Lfence_EC = 2049,
	Lfence_ED = 2050,
	Lfence_EE = 2051,
	Lfence_EF = 2052,
	Mfence = 2053,
	Mfence_F1 = 2054,
	Mfence_F2 = 2055,
	Mfence_F3 = 2056,
	Mfence_F4 = 2057,
	Mfence_F5 = 2058,
	Mfence_F6 = 2059,
	Mfence_F7 = 2060,
	Sfence = 2061,
	Sfence_F9 = 2062,
	Sfence_FA = 2063,
	Sfence_FB = 2064,
	Sfence_FC = 2065,
	Sfence_FD = 2066,
	Sfence_FE = 2067,
	Sfence_FF = 2068,
	Pcommit = 2069,
	Imul_r16_rm16 = 2070,
	Imul_r32_rm32 = 2071,
	Imul_r64_rm64 = 2072,
	Cmpxchg_rm8_r8 = 2073,
	Cmpxchg_rm16_r16 = 2074,
	Cmpxchg_rm32_r32 = 2075,
	Cmpxchg_rm64_r64 = 2076,
	Lss_r16_m1616 = 2077,
	Lss_r32_m1632 = 2078,
	Lss_r64_m1664 = 2079,
	Btr_rm16_r16 = 2080,
	Btr_rm32_r32 = 2081,
	Btr_rm64_r64 = 2082,
	Lfs_r16_m1616 = 2083,
	Lfs_r32_m1632 = 2084,
	Lfs_r64_m1664 = 2085,
	Lgs_r16_m1616 = 2086,
	Lgs_r32_m1632 = 2087,
	Lgs_r64_m1664 = 2088,
	Movzx_r16_rm8 = 2089,
	Movzx_r32_rm8 = 2090,
	Movzx_r64_rm8 = 2091,
	Movzx_r16_rm16 = 2092,
	Movzx_r32_rm16 = 2093,
	Movzx_r64_rm16 = 2094,
	Jmpe_disp16 = 2095,
	Jmpe_disp32 = 2096,
	Popcnt_r16_rm16 = 2097,
	Popcnt_r32_rm32 = 2098,
	Popcnt_r64_rm64 = 2099,
	Ud1_r16_rm16 = 2100,
	Ud1_r32_rm32 = 2101,
	Ud1_r64_rm64 = 2102,
	Bt_rm16_imm8 = 2103,
	Bt_rm32_imm8 = 2104,
	Bt_rm64_imm8 = 2105,
	Bts_rm16_imm8 = 2106,
	Bts_rm32_imm8 = 2107,
	Bts_rm64_imm8 = 2108,
	Btr_rm16_imm8 = 2109,
	Btr_rm32_imm8 = 2110,
	Btr_rm64_imm8 = 2111,
	Btc_rm16_imm8 = 2112,
	Btc_rm32_imm8 = 2113,
	Btc_rm64_imm8 = 2114,
	Btc_rm16_r16 = 2115,
	Btc_rm32_r32 = 2116,
	Btc_rm64_r64 = 2117,
	Bsf_r16_rm16 = 2118,
	Bsf_r32_rm32 = 2119,
	Bsf_r64_rm64 = 2120,
	Tzcnt_r16_rm16 = 2121,
	Tzcnt_r32_rm32 = 2122,
	Tzcnt_r64_rm64 = 2123,
	Bsr_r16_rm16 = 2124,
	Bsr_r32_rm32 = 2125,
	Bsr_r64_rm64 = 2126,
	Lzcnt_r16_rm16 = 2127,
	Lzcnt_r32_rm32 = 2128,
	Lzcnt_r64_rm64 = 2129,
	Movsx_r16_rm8 = 2130,
	Movsx_r32_rm8 = 2131,
	Movsx_r64_rm8 = 2132,
	Movsx_r16_rm16 = 2133,
	Movsx_r32_rm16 = 2134,
	Movsx_r64_rm16 = 2135,
	Xadd_rm8_r8 = 2136,
	Xadd_rm16_r16 = 2137,
	Xadd_rm32_r32 = 2138,
	Xadd_rm64_r64 = 2139,
	Cmpps_xmm_xmmm128_imm8 = 2140,
	VEX_Vcmpps_xmm_xmm_xmmm128_imm8 = 2141,
	VEX_Vcmpps_ymm_ymm_ymmm256_imm8 = 2142,
	EVEX_Vcmpps_k_k1_xmm_xmmm128b32_imm8 = 2143,
	EVEX_Vcmpps_k_k1_ymm_ymmm256b32_imm8 = 2144,
	EVEX_Vcmpps_k_k1_zmm_zmmm512b32_imm8_sae = 2145,
	Cmppd_xmm_xmmm128_imm8 = 2146,
	VEX_Vcmppd_xmm_xmm_xmmm128_imm8 = 2147,
	VEX_Vcmppd_ymm_ymm_ymmm256_imm8 = 2148,
	EVEX_Vcmppd_k_k1_xmm_xmmm128b64_imm8 = 2149,
	EVEX_Vcmppd_k_k1_ymm_ymmm256b64_imm8 = 2150,
	EVEX_Vcmppd_k_k1_zmm_zmmm512b64_imm8_sae = 2151,
	Cmpss_xmm_xmmm32_imm8 = 2152,
	VEX_Vcmpss_xmm_xmm_xmmm32_imm8 = 2153,
	EVEX_Vcmpss_k_k1_xmm_xmmm32_imm8_sae = 2154,
	Cmpsd_xmm_xmmm64_imm8 = 2155,
	VEX_Vcmpsd_xmm_xmm_xmmm64_imm8 = 2156,
	EVEX_Vcmpsd_k_k1_xmm_xmmm64_imm8_sae = 2157,
	Movnti_m32_r32 = 2158,
	Movnti_m64_r64 = 2159,
	Pinsrw_mm_r32m16_imm8 = 2160,
	Pinsrw_mm_r64m16_imm8 = 2161,
	Pinsrw_xmm_r32m16_imm8 = 2162,
	Pinsrw_xmm_r64m16_imm8 = 2163,
	VEX_Vpinsrw_xmm_xmm_r32m16_imm8 = 2164,
	VEX_Vpinsrw_xmm_xmm_r64m16_imm8 = 2165,
	EVEX_Vpinsrw_xmm_xmm_r32m16_imm8 = 2166,
	EVEX_Vpinsrw_xmm_xmm_r64m16_imm8 = 2167,
	Pextrw_r32_mm_imm8 = 2168,
	Pextrw_r64_mm_imm8 = 2169,
	Pextrw_r32_xmm_imm8 = 2170,
	Pextrw_r64_xmm_imm8 = 2171,
	VEX_Vpextrw_r32_xmm_imm8 = 2172,
	VEX_Vpextrw_r64_xmm_imm8 = 2173,
	EVEX_Vpextrw_r32_xmm_imm8 = 2174,
	EVEX_Vpextrw_r64_xmm_imm8 = 2175,
	Shufps_xmm_xmmm128_imm8 = 2176,
	VEX_Vshufps_xmm_xmm_xmmm128_imm8 = 2177,
	VEX_Vshufps_ymm_ymm_ymmm256_imm8 = 2178,
	EVEX_Vshufps_xmm_k1z_xmm_xmmm128b32_imm8 = 2179,
	EVEX_Vshufps_ymm_k1z_ymm_ymmm256b32_imm8 = 2180,
	EVEX_Vshufps_zmm_k1z_zmm_zmmm512b32_imm8 = 2181,
	Shufpd_xmm_xmmm128_imm8 = 2182,
	VEX_Vshufpd_xmm_xmm_xmmm128_imm8 = 2183,
	VEX_Vshufpd_ymm_ymm_ymmm256_imm8 = 2184,
	EVEX_Vshufpd_xmm_k1z_xmm_xmmm128b64_imm8 = 2185,
	EVEX_Vshufpd_ymm_k1z_ymm_ymmm256b64_imm8 = 2186,
	EVEX_Vshufpd_zmm_k1z_zmm_zmmm512b64_imm8 = 2187,
	Cmpxchg8b_m64 = 2188,
	Cmpxchg16b_m128 = 2189,
	Xrstors_mem = 2190,
	Xrstors64_mem = 2191,
	Xsavec_mem = 2192,
	Xsavec64_mem = 2193,
	Xsaves_mem = 2194,
	Xsaves64_mem = 2195,
	Vmptrld_m64 = 2196,
	Vmclear_m64 = 2197,
	Vmxon_m64 = 2198,
	Rdrand_r16 = 2199,
	Rdrand_r32 = 2200,
	Rdrand_r64 = 2201,
	Vmptrst_m64 = 2202,
	Rdseed_r16 = 2203,
	Rdseed_r32 = 2204,
	Rdseed_r64 = 2205,
	Rdpid_r32 = 2206,
	Rdpid_r64 = 2207,
	Bswap_r16 = 2208,
	Bswap_r32 = 2209,
	Bswap_r64 = 2210,
	Addsubpd_xmm_xmmm128 = 2211,
	VEX_Vaddsubpd_xmm_xmm_xmmm128 = 2212,
	VEX_Vaddsubpd_ymm_ymm_ymmm256 = 2213,
	Addsubps_xmm_xmmm128 = 2214,
	VEX_Vaddsubps_xmm_xmm_xmmm128 = 2215,
	VEX_Vaddsubps_ymm_ymm_ymmm256 = 2216,
	Psrlw_mm_mmm64 = 2217,
	Psrlw_xmm_xmmm128 = 2218,
	VEX_Vpsrlw_xmm_xmm_xmmm128 = 2219,
	VEX_Vpsrlw_ymm_ymm_xmmm128 = 2220,
	EVEX_Vpsrlw_xmm_k1z_xmm_xmmm128 = 2221,
	EVEX_Vpsrlw_ymm_k1z_ymm_xmmm128 = 2222,
	EVEX_Vpsrlw_zmm_k1z_zmm_xmmm128 = 2223,
	Psrld_mm_mmm64 = 2224,
	Psrld_xmm_xmmm128 = 2225,
	VEX_Vpsrld_xmm_xmm_xmmm128 = 2226,
	VEX_Vpsrld_ymm_ymm_xmmm128 = 2227,
	EVEX_Vpsrld_xmm_k1z_xmm_xmmm128 = 2228,
	EVEX_Vpsrld_ymm_k1z_ymm_xmmm128 = 2229,
	EVEX_Vpsrld_zmm_k1z_zmm_xmmm128 = 2230,
	Psrlq_mm_mmm64 = 2231,
	Psrlq_xmm_xmmm128 = 2232,
	VEX_Vpsrlq_xmm_xmm_xmmm128 = 2233,
	VEX_Vpsrlq_ymm_ymm_xmmm128 = 2234,
	EVEX_Vpsrlq_xmm_k1z_xmm_xmmm128 = 2235,
	EVEX_Vpsrlq_ymm_k1z_ymm_xmmm128 = 2236,
	EVEX_Vpsrlq_zmm_k1z_zmm_xmmm128 = 2237,
	Paddq_mm_mmm64 = 2238,
	Paddq_xmm_xmmm128 = 2239,
	VEX_Vpaddq_xmm_xmm_xmmm128 = 2240,
	VEX_Vpaddq_ymm_ymm_ymmm256 = 2241,
	EVEX_Vpaddq_xmm_k1z_xmm_xmmm128b64 = 2242,
	EVEX_Vpaddq_ymm_k1z_ymm_ymmm256b64 = 2243,
	EVEX_Vpaddq_zmm_k1z_zmm_zmmm512b64 = 2244,
	Pmullw_mm_mmm64 = 2245,
	Pmullw_xmm_xmmm128 = 2246,
	VEX_Vpmullw_xmm_xmm_xmmm128 = 2247,
	VEX_Vpmullw_ymm_ymm_ymmm256 = 2248,
	EVEX_Vpmullw_xmm_k1z_xmm_xmmm128 = 2249,
	EVEX_Vpmullw_ymm_k1z_ymm_ymmm256 = 2250,
	EVEX_Vpmullw_zmm_k1z_zmm_zmmm512 = 2251,
	Movq_xmmm64_xmm = 2252,
	VEX_Vmovq_xmmm64_xmm = 2253,
	EVEX_Vmovq_xmmm64_xmm = 2254,
	Movq2dq_xmm_mm = 2255,
	Movdq2q_mm_xmm = 2256,
	Pmovmskb_r32_mm = 2257,
	Pmovmskb_r64_mm = 2258,
	Pmovmskb_r32_xmm = 2259,
	Pmovmskb_r64_xmm = 2260,
	VEX_Vpmovmskb_r32_xmm = 2261,
	VEX_Vpmovmskb_r64_xmm = 2262,
	VEX_Vpmovmskb_r32_ymm = 2263,
	VEX_Vpmovmskb_r64_ymm = 2264,
	Psubusb_mm_mmm64 = 2265,
	Psubusb_xmm_xmmm128 = 2266,
	VEX_Vpsubusb_xmm_xmm_xmmm128 = 2267,
	VEX_Vpsubusb_ymm_ymm_ymmm256 = 2268,
	EVEX_Vpsubusb_xmm_k1z_xmm_xmmm128 = 2269,
	EVEX_Vpsubusb_ymm_k1z_ymm_ymmm256 = 2270,
	EVEX_Vpsubusb_zmm_k1z_zmm_zmmm512 = 2271,
	Psubusw_mm_mmm64 = 2272,
	Psubusw_xmm_xmmm128 = 2273,
	VEX_Vpsubusw_xmm_xmm_xmmm128 = 2274,
	VEX_Vpsubusw_ymm_ymm_ymmm256 = 2275,
	EVEX_Vpsubusw_xmm_k1z_xmm_xmmm128 = 2276,
	EVEX_Vpsubusw_ymm_k1z_ymm_ymmm256 = 2277,
	EVEX_Vpsubusw_zmm_k1z_zmm_zmmm512 = 2278,
	Pminub_mm_mmm64 = 2279,
	Pminub_xmm_xmmm128 = 2280,
	VEX_Vpminub_xmm_xmm_xmmm128 = 2281,
	VEX_Vpminub_ymm_ymm_ymmm256 = 2282,
	EVEX_Vpminub_xmm_k1z_xmm_xmmm128 = 2283,
	EVEX_Vpminub_ymm_k1z_ymm_ymmm256 = 2284,
	EVEX_Vpminub_zmm_k1z_zmm_zmmm512 = 2285,
	Pand_mm_mmm64 = 2286,
	Pand_xmm_xmmm128 = 2287,
	VEX_Vpand_xmm_xmm_xmmm128 = 2288,
	VEX_Vpand_ymm_ymm_ymmm256 = 2289,
	EVEX_Vpandd_xmm_k1z_xmm_xmmm128b32 = 2290,
	EVEX_Vpandd_ymm_k1z_ymm_ymmm256b32 = 2291,
	EVEX_Vpandd_zmm_k1z_zmm_zmmm512b32 = 2292,
	EVEX_Vpandq_xmm_k1z_xmm_xmmm128b64 = 2293,
	EVEX_Vpandq_ymm_k1z_ymm_ymmm256b64 = 2294,
	EVEX_Vpandq_zmm_k1z_zmm_zmmm512b64 = 2295,
	Paddusb_mm_mmm64 = 2296,
	Paddusb_xmm_xmmm128 = 2297,
	VEX_Vpaddusb_xmm_xmm_xmmm128 = 2298,
	VEX_Vpaddusb_ymm_ymm_ymmm256 = 2299,
	EVEX_Vpaddusb_xmm_k1z_xmm_xmmm128 = 2300,
	EVEX_Vpaddusb_ymm_k1z_ymm_ymmm256 = 2301,
	EVEX_Vpaddusb_zmm_k1z_zmm_zmmm512 = 2302,
	Paddusw_mm_mmm64 = 2303,
	Paddusw_xmm_xmmm128 = 2304,
	VEX_Vpaddusw_xmm_xmm_xmmm128 = 2305,
	VEX_Vpaddusw_ymm_ymm_ymmm256 = 2306,
	EVEX_Vpaddusw_xmm_k1z_xmm_xmmm128 = 2307,
	EVEX_Vpaddusw_ymm_k1z_ymm_ymmm256 = 2308,
	EVEX_Vpaddusw_zmm_k1z_zmm_zmmm512 = 2309,
	Pmaxub_mm_mmm64 = 2310,
	Pmaxub_xmm_xmmm128 = 2311,
	VEX_Vpmaxub_xmm_xmm_xmmm128 = 2312,
	VEX_Vpmaxub_ymm_ymm_ymmm256 = 2313,
	EVEX_Vpmaxub_xmm_k1z_xmm_xmmm128 = 2314,
	EVEX_Vpmaxub_ymm_k1z_ymm_ymmm256 = 2315,
	EVEX_Vpmaxub_zmm_k1z_zmm_zmmm512 = 2316,
	Pandn_mm_mmm64 = 2317,
	Pandn_xmm_xmmm128 = 2318,
	VEX_Vpandn_xmm_xmm_xmmm128 = 2319,
	VEX_Vpandn_ymm_ymm_ymmm256 = 2320,
	EVEX_Vpandnd_xmm_k1z_xmm_xmmm128b32 = 2321,
	EVEX_Vpandnd_ymm_k1z_ymm_ymmm256b32 = 2322,
	EVEX_Vpandnd_zmm_k1z_zmm_zmmm512b32 = 2323,
	EVEX_Vpandnq_xmm_k1z_xmm_xmmm128b64 = 2324,
	EVEX_Vpandnq_ymm_k1z_ymm_ymmm256b64 = 2325,
	EVEX_Vpandnq_zmm_k1z_zmm_zmmm512b64 = 2326,
	Pavgb_mm_mmm64 = 2327,
	Pavgb_xmm_xmmm128 = 2328,
	VEX_Vpavgb_xmm_xmm_xmmm128 = 2329,
	VEX_Vpavgb_ymm_ymm_ymmm256 = 2330,
	EVEX_Vpavgb_xmm_k1z_xmm_xmmm128 = 2331,
	EVEX_Vpavgb_ymm_k1z_ymm_ymmm256 = 2332,
	EVEX_Vpavgb_zmm_k1z_zmm_zmmm512 = 2333,
	Psraw_mm_mmm64 = 2334,
	Psraw_xmm_xmmm128 = 2335,
	VEX_Vpsraw_xmm_xmm_xmmm128 = 2336,
	VEX_Vpsraw_ymm_ymm_xmmm128 = 2337,
	EVEX_Vpsraw_xmm_k1z_xmm_xmmm128 = 2338,
	EVEX_Vpsraw_ymm_k1z_ymm_xmmm128 = 2339,
	EVEX_Vpsraw_zmm_k1z_zmm_xmmm128 = 2340,
	Psrad_mm_mmm64 = 2341,
	Psrad_xmm_xmmm128 = 2342,
	VEX_Vpsrad_xmm_xmm_xmmm128 = 2343,
	VEX_Vpsrad_ymm_ymm_xmmm128 = 2344,
	EVEX_Vpsrad_xmm_k1z_xmm_xmmm128 = 2345,
	EVEX_Vpsrad_ymm_k1z_ymm_xmmm128 = 2346,
	EVEX_Vpsrad_zmm_k1z_zmm_xmmm128 = 2347,
	EVEX_Vpsraq_xmm_k1z_xmm_xmmm128 = 2348,
	EVEX_Vpsraq_ymm_k1z_ymm_xmmm128 = 2349,
	EVEX_Vpsraq_zmm_k1z_zmm_xmmm128 = 2350,
	Pavgw_mm_mmm64 = 2351,
	Pavgw_xmm_xmmm128 = 2352,
	VEX_Vpavgw_xmm_xmm_xmmm128 = 2353,
	VEX_Vpavgw_ymm_ymm_ymmm256 = 2354,
	EVEX_Vpavgw_xmm_k1z_xmm_xmmm128 = 2355,
	EVEX_Vpavgw_ymm_k1z_ymm_ymmm256 = 2356,
	EVEX_Vpavgw_zmm_k1z_zmm_zmmm512 = 2357,
	Pmulhuw_mm_mmm64 = 2358,
	Pmulhuw_xmm_xmmm128 = 2359,
	VEX_Vpmulhuw_xmm_xmm_xmmm128 = 2360,
	VEX_Vpmulhuw_ymm_ymm_ymmm256 = 2361,
	EVEX_Vpmulhuw_xmm_k1z_xmm_xmmm128 = 2362,
	EVEX_Vpmulhuw_ymm_k1z_ymm_ymmm256 = 2363,
	EVEX_Vpmulhuw_zmm_k1z_zmm_zmmm512 = 2364,
	Pmulhw_mm_mmm64 = 2365,
	Pmulhw_xmm_xmmm128 = 2366,
	VEX_Vpmulhw_xmm_xmm_xmmm128 = 2367,
	VEX_Vpmulhw_ymm_ymm_ymmm256 = 2368,
	EVEX_Vpmulhw_xmm_k1z_xmm_xmmm128 = 2369,
	EVEX_Vpmulhw_ymm_k1z_ymm_ymmm256 = 2370,
	EVEX_Vpmulhw_zmm_k1z_zmm_zmmm512 = 2371,
	Cvttpd2dq_xmm_xmmm128 = 2372,
	VEX_Vcvttpd2dq_xmm_xmmm128 = 2373,
	VEX_Vcvttpd2dq_xmm_ymmm256 = 2374,
	EVEX_Vcvttpd2dq_xmm_k1z_xmmm128b64 = 2375,
	EVEX_Vcvttpd2dq_xmm_k1z_ymmm256b64 = 2376,
	EVEX_Vcvttpd2dq_ymm_k1z_zmmm512b64_sae = 2377,
	Cvtdq2pd_xmm_xmmm64 = 2378,
	VEX_Vcvtdq2pd_xmm_xmmm64 = 2379,
	VEX_Vcvtdq2pd_ymm_xmmm128 = 2380,
	EVEX_Vcvtdq2pd_xmm_k1z_xmmm64b32 = 2381,
	EVEX_Vcvtdq2pd_ymm_k1z_xmmm128b32 = 2382,
	EVEX_Vcvtdq2pd_zmm_k1z_ymmm256b32 = 2383,
	EVEX_Vcvtqq2pd_xmm_k1z_xmmm128b64 = 2384,
	EVEX_Vcvtqq2pd_ymm_k1z_ymmm256b64 = 2385,
	EVEX_Vcvtqq2pd_zmm_k1z_zmmm512b64_er = 2386,
	Cvtpd2dq_xmm_xmmm128 = 2387,
	VEX_Vcvtpd2dq_xmm_xmmm128 = 2388,
	VEX_Vcvtpd2dq_xmm_ymmm256 = 2389,
	EVEX_Vcvtpd2dq_xmm_k1z_xmmm128b64 = 2390,
	EVEX_Vcvtpd2dq_xmm_k1z_ymmm256b64 = 2391,
	EVEX_Vcvtpd2dq_ymm_k1z_zmmm512b64_er = 2392,
	Movntq_m64_mm = 2393,
	Movntdq_m128_xmm = 2394,
	VEX_Vmovntdq_m128_xmm = 2395,
	VEX_Vmovntdq_m256_ymm = 2396,
	EVEX_Vmovntdq_m128_xmm = 2397,
	EVEX_Vmovntdq_m256_ymm = 2398,
	EVEX_Vmovntdq_m512_zmm = 2399,
	Psubsb_mm_mmm64 = 2400,
	Psubsb_xmm_xmmm128 = 2401,
	VEX_Vpsubsb_xmm_xmm_xmmm128 = 2402,
	VEX_Vpsubsb_ymm_ymm_ymmm256 = 2403,
	EVEX_Vpsubsb_xmm_k1z_xmm_xmmm128 = 2404,
	EVEX_Vpsubsb_ymm_k1z_ymm_ymmm256 = 2405,
	EVEX_Vpsubsb_zmm_k1z_zmm_zmmm512 = 2406,
	Psubsw_mm_mmm64 = 2407,
	Psubsw_xmm_xmmm128 = 2408,
	VEX_Vpsubsw_xmm_xmm_xmmm128 = 2409,
	VEX_Vpsubsw_ymm_ymm_ymmm256 = 2410,
	EVEX_Vpsubsw_xmm_k1z_xmm_xmmm128 = 2411,
	EVEX_Vpsubsw_ymm_k1z_ymm_ymmm256 = 2412,
	EVEX_Vpsubsw_zmm_k1z_zmm_zmmm512 = 2413,
	Pminsw_mm_mmm64 = 2414,
	Pminsw_xmm_xmmm128 = 2415,
	VEX_Vpminsw_xmm_xmm_xmmm128 = 2416,
	VEX_Vpminsw_ymm_ymm_ymmm256 = 2417,
	EVEX_Vpminsw_xmm_k1z_xmm_xmmm128 = 2418,
	EVEX_Vpminsw_ymm_k1z_ymm_ymmm256 = 2419,
	EVEX_Vpminsw_zmm_k1z_zmm_zmmm512 = 2420,
	Por_mm_mmm64 = 2421,
	Por_xmm_xmmm128 = 2422,
	VEX_Vpor_xmm_xmm_xmmm128 = 2423,
	VEX_Vpor_ymm_ymm_ymmm256 = 2424,
	EVEX_Vpord_xmm_k1z_xmm_xmmm128b32 = 2425,
	EVEX_Vpord_ymm_k1z_ymm_ymmm256b32 = 2426,
	EVEX_Vpord_zmm_k1z_zmm_zmmm512b32 = 2427,
	EVEX_Vporq_xmm_k1z_xmm_xmmm128b64 = 2428,
	EVEX_Vporq_ymm_k1z_ymm_ymmm256b64 = 2429,
	EVEX_Vporq_zmm_k1z_zmm_zmmm512b64 = 2430,
	Paddsb_mm_mmm64 = 2431,
	Paddsb_xmm_xmmm128 = 2432,
	VEX_Vpaddsb_xmm_xmm_xmmm128 = 2433,
	VEX_Vpaddsb_ymm_ymm_ymmm256 = 2434,
	EVEX_Vpaddsb_xmm_k1z_xmm_xmmm128 = 2435,
	EVEX_Vpaddsb_ymm_k1z_ymm_ymmm256 = 2436,
	EVEX_Vpaddsb_zmm_k1z_zmm_zmmm512 = 2437,
	Paddsw_mm_mmm64 = 2438,
	Paddsw_xmm_xmmm128 = 2439,
	VEX_Vpaddsw_xmm_xmm_xmmm128 = 2440,
	VEX_Vpaddsw_ymm_ymm_ymmm256 = 2441,
	EVEX_Vpaddsw_xmm_k1z_xmm_xmmm128 = 2442,
	EVEX_Vpaddsw_ymm_k1z_ymm_ymmm256 = 2443,
	EVEX_Vpaddsw_zmm_k1z_zmm_zmmm512 = 2444,
	Pmaxsw_mm_mmm64 = 2445,
	Pmaxsw_xmm_xmmm128 = 2446,
	VEX_Vpmaxsw_xmm_xmm_xmmm128 = 2447,
	VEX_Vpmaxsw_ymm_ymm_ymmm256 = 2448,
	EVEX_Vpmaxsw_xmm_k1z_xmm_xmmm128 = 2449,
	EVEX_Vpmaxsw_ymm_k1z_ymm_ymmm256 = 2450,
	EVEX_Vpmaxsw_zmm_k1z_zmm_zmmm512 = 2451,
	Pxor_mm_mmm64 = 2452,
	Pxor_xmm_xmmm128 = 2453,
	VEX_Vpxor_xmm_xmm_xmmm128 = 2454,
	VEX_Vpxor_ymm_ymm_ymmm256 = 2455,
	EVEX_Vpxord_xmm_k1z_xmm_xmmm128b32 = 2456,
	EVEX_Vpxord_ymm_k1z_ymm_ymmm256b32 = 2457,
	EVEX_Vpxord_zmm_k1z_zmm_zmmm512b32 = 2458,
	EVEX_Vpxorq_xmm_k1z_xmm_xmmm128b64 = 2459,
	EVEX_Vpxorq_ymm_k1z_ymm_ymmm256b64 = 2460,
	EVEX_Vpxorq_zmm_k1z_zmm_zmmm512b64 = 2461,
	Lddqu_xmm_m128 = 2462,
	VEX_Vlddqu_xmm_m128 = 2463,
	VEX_Vlddqu_ymm_m256 = 2464,
	Psllw_mm_mmm64 = 2465,
	Psllw_xmm_xmmm128 = 2466,
	VEX_Vpsllw_xmm_xmm_xmmm128 = 2467,
	VEX_Vpsllw_ymm_ymm_xmmm128 = 2468,
	EVEX_Vpsllw_xmm_k1z_xmm_xmmm128 = 2469,
	EVEX_Vpsllw_ymm_k1z_ymm_xmmm128 = 2470,
	EVEX_Vpsllw_zmm_k1z_zmm_xmmm128 = 2471,
	Pslld_mm_mmm64 = 2472,
	Pslld_xmm_xmmm128 = 2473,
	VEX_Vpslld_xmm_xmm_xmmm128 = 2474,
	VEX_Vpslld_ymm_ymm_xmmm128 = 2475,
	EVEX_Vpslld_xmm_k1z_xmm_xmmm128 = 2476,
	EVEX_Vpslld_ymm_k1z_ymm_xmmm128 = 2477,
	EVEX_Vpslld_zmm_k1z_zmm_xmmm128 = 2478,
	Psllq_mm_mmm64 = 2479,
	Psllq_xmm_xmmm128 = 2480,
	VEX_Vpsllq_xmm_xmm_xmmm128 = 2481,
	VEX_Vpsllq_ymm_ymm_xmmm128 = 2482,
	EVEX_Vpsllq_xmm_k1z_xmm_xmmm128 = 2483,
	EVEX_Vpsllq_ymm_k1z_ymm_xmmm128 = 2484,
	EVEX_Vpsllq_zmm_k1z_zmm_xmmm128 = 2485,
	Pmuludq_mm_mmm64 = 2486,
	Pmuludq_xmm_xmmm128 = 2487,
	VEX_Vpmuludq_xmm_xmm_xmmm128 = 2488,
	VEX_Vpmuludq_ymm_ymm_ymmm256 = 2489,
	EVEX_Vpmuludq_xmm_k1z_xmm_xmmm128b64 = 2490,
	EVEX_Vpmuludq_ymm_k1z_ymm_ymmm256b64 = 2491,
	EVEX_Vpmuludq_zmm_k1z_zmm_zmmm512b64 = 2492,
	Pmaddwd_mm_mmm64 = 2493,
	Pmaddwd_xmm_xmmm128 = 2494,
	VEX_Vpmaddwd_xmm_xmm_xmmm128 = 2495,
	VEX_Vpmaddwd_ymm_ymm_ymmm256 = 2496,
	EVEX_Vpmaddwd_xmm_k1z_xmm_xmmm128 = 2497,
	EVEX_Vpmaddwd_ymm_k1z_ymm_ymmm256 = 2498,
	EVEX_Vpmaddwd_zmm_k1z_zmm_zmmm512 = 2499,
	Psadbw_mm_mmm64 = 2500,
	Psadbw_xmm_xmmm128 = 2501,
	VEX_Vpsadbw_xmm_xmm_xmmm128 = 2502,
	VEX_Vpsadbw_ymm_ymm_ymmm256 = 2503,
	EVEX_Vpsadbw_xmm_xmm_xmmm128 = 2504,
	EVEX_Vpsadbw_ymm_ymm_ymmm256 = 2505,
	EVEX_Vpsadbw_zmm_zmm_zmmm512 = 2506,
	Maskmovq_rDI_mm_mm = 2507,
	Maskmovdqu_rDI_xmm_xmm = 2508,
	VEX_Vmaskmovdqu_rDI_xmm_xmm = 2509,
	Psubb_mm_mmm64 = 2510,
	Psubb_xmm_xmmm128 = 2511,
	VEX_Vpsubb_xmm_xmm_xmmm128 = 2512,
	VEX_Vpsubb_ymm_ymm_ymmm256 = 2513,
	EVEX_Vpsubb_xmm_k1z_xmm_xmmm128 = 2514,
	EVEX_Vpsubb_ymm_k1z_ymm_ymmm256 = 2515,
	EVEX_Vpsubb_zmm_k1z_zmm_zmmm512 = 2516,
	Psubw_mm_mmm64 = 2517,
	Psubw_xmm_xmmm128 = 2518,
	VEX_Vpsubw_xmm_xmm_xmmm128 = 2519,
	VEX_Vpsubw_ymm_ymm_ymmm256 = 2520,
	EVEX_Vpsubw_xmm_k1z_xmm_xmmm128 = 2521,
	EVEX_Vpsubw_ymm_k1z_ymm_ymmm256 = 2522,
	EVEX_Vpsubw_zmm_k1z_zmm_zmmm512 = 2523,
	Psubd_mm_mmm64 = 2524,
	Psubd_xmm_xmmm128 = 2525,
	VEX_Vpsubd_xmm_xmm_xmmm128 = 2526,
	VEX_Vpsubd_ymm_ymm_ymmm256 = 2527,
	EVEX_Vpsubd_xmm_k1z_xmm_xmmm128b32 = 2528,
	EVEX_Vpsubd_ymm_k1z_ymm_ymmm256b32 = 2529,
	EVEX_Vpsubd_zmm_k1z_zmm_zmmm512b32 = 2530,
	Psubq_mm_mmm64 = 2531,
	Psubq_xmm_xmmm128 = 2532,
	VEX_Vpsubq_xmm_xmm_xmmm128 = 2533,
	VEX_Vpsubq_ymm_ymm_ymmm256 = 2534,
	EVEX_Vpsubq_xmm_k1z_xmm_xmmm128b64 = 2535,
	EVEX_Vpsubq_ymm_k1z_ymm_ymmm256b64 = 2536,
	EVEX_Vpsubq_zmm_k1z_zmm_zmmm512b64 = 2537,
	Paddb_mm_mmm64 = 2538,
	Paddb_xmm_xmmm128 = 2539,
	VEX_Vpaddb_xmm_xmm_xmmm128 = 2540,
	VEX_Vpaddb_ymm_ymm_ymmm256 = 2541,
	EVEX_Vpaddb_xmm_k1z_xmm_xmmm128 = 2542,
	EVEX_Vpaddb_ymm_k1z_ymm_ymmm256 = 2543,
	EVEX_Vpaddb_zmm_k1z_zmm_zmmm512 = 2544,
	Paddw_mm_mmm64 = 2545,
	Paddw_xmm_xmmm128 = 2546,
	VEX_Vpaddw_xmm_xmm_xmmm128 = 2547,
	VEX_Vpaddw_ymm_ymm_ymmm256 = 2548,
	EVEX_Vpaddw_xmm_k1z_xmm_xmmm128 = 2549,
	EVEX_Vpaddw_ymm_k1z_ymm_ymmm256 = 2550,
	EVEX_Vpaddw_zmm_k1z_zmm_zmmm512 = 2551,
	Paddd_mm_mmm64 = 2552,
	Paddd_xmm_xmmm128 = 2553,
	VEX_Vpaddd_xmm_xmm_xmmm128 = 2554,
	VEX_Vpaddd_ymm_ymm_ymmm256 = 2555,
	EVEX_Vpaddd_xmm_k1z_xmm_xmmm128b32 = 2556,
	EVEX_Vpaddd_ymm_k1z_ymm_ymmm256b32 = 2557,
	EVEX_Vpaddd_zmm_k1z_zmm_zmmm512b32 = 2558,
	Ud0_r16_rm16 = 2559,
	Ud0_r32_rm32 = 2560,
	Ud0_r64_rm64 = 2561,
	Pshufb_mm_mmm64 = 2562,
	Pshufb_xmm_xmmm128 = 2563,
	VEX_Vpshufb_xmm_xmm_xmmm128 = 2564,
	VEX_Vpshufb_ymm_ymm_ymmm256 = 2565,
	EVEX_Vpshufb_xmm_k1z_xmm_xmmm128 = 2566,
	EVEX_Vpshufb_ymm_k1z_ymm_ymmm256 = 2567,
	EVEX_Vpshufb_zmm_k1z_zmm_zmmm512 = 2568,
	Phaddw_mm_mmm64 = 2569,
	Phaddw_xmm_xmmm128 = 2570,
	VEX_Vphaddw_xmm_xmm_xmmm128 = 2571,
	VEX_Vphaddw_ymm_ymm_ymmm256 = 2572,
	Phaddd_mm_mmm64 = 2573,
	Phaddd_xmm_xmmm128 = 2574,
	VEX_Vphaddd_xmm_xmm_xmmm128 = 2575,
	VEX_Vphaddd_ymm_ymm_ymmm256 = 2576,
	Phaddsw_mm_mmm64 = 2577,
	Phaddsw_xmm_xmmm128 = 2578,
	VEX_Vphaddsw_xmm_xmm_xmmm128 = 2579,
	VEX_Vphaddsw_ymm_ymm_ymmm256 = 2580,
	Pmaddubsw_mm_mmm64 = 2581,
	Pmaddubsw_xmm_xmmm128 = 2582,
	VEX_Vpmaddubsw_xmm_xmm_xmmm128 = 2583,
	VEX_Vpmaddubsw_ymm_ymm_ymmm256 = 2584,
	EVEX_Vpmaddubsw_xmm_k1z_xmm_xmmm128 = 2585,
	EVEX_Vpmaddubsw_ymm_k1z_ymm_ymmm256 = 2586,
	EVEX_Vpmaddubsw_zmm_k1z_zmm_zmmm512 = 2587,
	Phsubw_mm_mmm64 = 2588,
	Phsubw_xmm_xmmm128 = 2589,
	VEX_Vphsubw_xmm_xmm_xmmm128 = 2590,
	VEX_Vphsubw_ymm_ymm_ymmm256 = 2591,
	Phsubd_mm_mmm64 = 2592,
	Phsubd_xmm_xmmm128 = 2593,
	VEX_Vphsubd_xmm_xmm_xmmm128 = 2594,
	VEX_Vphsubd_ymm_ymm_ymmm256 = 2595,
	Phsubsw_mm_mmm64 = 2596,
	Phsubsw_xmm_xmmm128 = 2597,
	VEX_Vphsubsw_xmm_xmm_xmmm128 = 2598,
	VEX_Vphsubsw_ymm_ymm_ymmm256 = 2599,
	Psignb_mm_mmm64 = 2600,
	Psignb_xmm_xmmm128 = 2601,
	VEX_Vpsignb_xmm_xmm_xmmm128 = 2602,
	VEX_Vpsignb_ymm_ymm_ymmm256 = 2603,
	Psignw_mm_mmm64 = 2604,
	Psignw_xmm_xmmm128 = 2605,
	VEX_Vpsignw_xmm_xmm_xmmm128 = 2606,
	VEX_Vpsignw_ymm_ymm_ymmm256 = 2607,
	Psignd_mm_mmm64 = 2608,
	Psignd_xmm_xmmm128 = 2609,
	VEX_Vpsignd_xmm_xmm_xmmm128 = 2610,
	VEX_Vpsignd_ymm_ymm_ymmm256 = 2611,
	Pmulhrsw_mm_mmm64 = 2612,
	Pmulhrsw_xmm_xmmm128 = 2613,
	VEX_Vpmulhrsw_xmm_xmm_xmmm128 = 2614,
	VEX_Vpmulhrsw_ymm_ymm_ymmm256 = 2615,
	EVEX_Vpmulhrsw_xmm_k1z_xmm_xmmm128 = 2616,
	EVEX_Vpmulhrsw_ymm_k1z_ymm_ymmm256 = 2617,
	EVEX_Vpmulhrsw_zmm_k1z_zmm_zmmm512 = 2618,
	VEX_Vpermilps_xmm_xmm_xmmm128 = 2619,
	VEX_Vpermilps_ymm_ymm_ymmm256 = 2620,
	EVEX_Vpermilps_xmm_k1z_xmm_xmmm128b32 = 2621,
	EVEX_Vpermilps_ymm_k1z_ymm_ymmm256b32 = 2622,
	EVEX_Vpermilps_zmm_k1z_zmm_zmmm512b32 = 2623,
	VEX_Vpermilpd_xmm_xmm_xmmm128 = 2624,
	VEX_Vpermilpd_ymm_ymm_ymmm256 = 2625,
	EVEX_Vpermilpd_xmm_k1z_xmm_xmmm128b64 = 2626,
	EVEX_Vpermilpd_ymm_k1z_ymm_ymmm256b64 = 2627,
	EVEX_Vpermilpd_zmm_k1z_zmm_zmmm512b64 = 2628,
	VEX_Vtestps_xmm_xmmm128 = 2629,
	VEX_Vtestps_ymm_ymmm256 = 2630,
	VEX_Vtestpd_xmm_xmmm128 = 2631,
	VEX_Vtestpd_ymm_ymmm256 = 2632,
	Pblendvb_xmm_xmmm128 = 2633,
	EVEX_Vpsrlvw_xmm_k1z_xmm_xmmm128 = 2634,
	EVEX_Vpsrlvw_ymm_k1z_ymm_ymmm256 = 2635,
	EVEX_Vpsrlvw_zmm_k1z_zmm_zmmm512 = 2636,
	EVEX_Vpmovuswb_xmmm64_k1z_xmm = 2637,
	EVEX_Vpmovuswb_xmmm128_k1z_ymm = 2638,
	EVEX_Vpmovuswb_ymmm256_k1z_zmm = 2639,
	EVEX_Vpsravw_xmm_k1z_xmm_xmmm128 = 2640,
	EVEX_Vpsravw_ymm_k1z_ymm_ymmm256 = 2641,
	EVEX_Vpsravw_zmm_k1z_zmm_zmmm512 = 2642,
	EVEX_Vpmovusdb_xmmm32_k1z_xmm = 2643,
	EVEX_Vpmovusdb_xmmm64_k1z_ymm = 2644,
	EVEX_Vpmovusdb_xmmm128_k1z_zmm = 2645,
	EVEX_Vpsllvw_xmm_k1z_xmm_xmmm128 = 2646,
	EVEX_Vpsllvw_ymm_k1z_ymm_ymmm256 = 2647,
	EVEX_Vpsllvw_zmm_k1z_zmm_zmmm512 = 2648,
	EVEX_Vpmovusqb_xmmm16_k1z_xmm = 2649,
	EVEX_Vpmovusqb_xmmm32_k1z_ymm = 2650,
	EVEX_Vpmovusqb_xmmm64_k1z_zmm = 2651,
	VEX_Vcvtph2ps_xmm_xmmm64 = 2652,
	VEX_Vcvtph2ps_ymm_xmmm128 = 2653,
	EVEX_Vcvtph2ps_xmm_k1z_xmmm64 = 2654,
	EVEX_Vcvtph2ps_ymm_k1z_xmmm128 = 2655,
	EVEX_Vcvtph2ps_zmm_k1z_ymmm256_sae = 2656,
	EVEX_Vpmovusdw_xmmm64_k1z_xmm = 2657,
	EVEX_Vpmovusdw_xmmm128_k1z_ymm = 2658,
	EVEX_Vpmovusdw_ymmm256_k1z_zmm = 2659,
	Blendvps_xmm_xmmm128 = 2660,
	EVEX_Vprorvd_xmm_k1z_xmm_xmmm128b32 = 2661,
	EVEX_Vprorvd_ymm_k1z_ymm_ymmm256b32 = 2662,
	EVEX_Vprorvd_zmm_k1z_zmm_zmmm512b32 = 2663,
	EVEX_Vprorvq_xmm_k1z_xmm_xmmm128b64 = 2664,
	EVEX_Vprorvq_ymm_k1z_ymm_ymmm256b64 = 2665,
	EVEX_Vprorvq_zmm_k1z_zmm_zmmm512b64 = 2666,
	EVEX_Vpmovusqw_xmmm32_k1z_xmm = 2667,
	EVEX_Vpmovusqw_xmmm64_k1z_ymm = 2668,
	EVEX_Vpmovusqw_xmmm128_k1z_zmm = 2669,
	Blendvpd_xmm_xmmm128 = 2670,
	EVEX_Vprolvd_xmm_k1z_xmm_xmmm128b32 = 2671,
	EVEX_Vprolvd_ymm_k1z_ymm_ymmm256b32 = 2672,
	EVEX_Vprolvd_zmm_k1z_zmm_zmmm512b32 = 2673,
	EVEX_Vprolvq_xmm_k1z_xmm_xmmm128b64 = 2674,
	EVEX_Vprolvq_ymm_k1z_ymm_ymmm256b64 = 2675,
	EVEX_Vprolvq_zmm_k1z_zmm_zmmm512b64 = 2676,
	EVEX_Vpmovusqd_xmmm64_k1z_xmm = 2677,
	EVEX_Vpmovusqd_xmmm128_k1z_ymm = 2678,
	EVEX_Vpmovusqd_ymmm256_k1z_zmm = 2679,
	VEX_Vpermps_ymm_ymm_ymmm256 = 2680,
	EVEX_Vpermps_ymm_k1z_ymm_ymmm256b32 = 2681,
	EVEX_Vpermps_zmm_k1z_zmm_zmmm512b32 = 2682,
	EVEX_Vpermpd_ymm_k1z_ymm_ymmm256b64 = 2683,
	EVEX_Vpermpd_zmm_k1z_zmm_zmmm512b64 = 2684,
	Ptest_xmm_xmmm128 = 2685,
	VEX_Vptest_xmm_xmmm128 = 2686,
	VEX_Vptest_ymm_ymmm256 = 2687,
	VEX_Vbroadcastss_xmm_xmmm32 = 2688,
	VEX_Vbroadcastss_ymm_xmmm32 = 2689,
	EVEX_Vbroadcastss_xmm_k1z_xmmm32 = 2690,
	EVEX_Vbroadcastss_ymm_k1z_xmmm32 = 2691,
	EVEX_Vbroadcastss_zmm_k1z_xmmm32 = 2692,
	VEX_Vbroadcastsd_ymm_xmmm64 = 2693,
	EVEX_Vbroadcastf32x2_ymm_k1z_xmmm64 = 2694,
	EVEX_Vbroadcastf32x2_zmm_k1z_xmmm64 = 2695,
	EVEX_Vbroadcastsd_ymm_k1z_xmmm64 = 2696,
	EVEX_Vbroadcastsd_zmm_k1z_xmmm64 = 2697,
	VEX_Vbroadcastf128_ymm_m128 = 2698,
	EVEX_Vbroadcastf32x4_ymm_k1z_m128 = 2699,
	EVEX_Vbroadcastf32x4_zmm_k1z_m128 = 2700,
	EVEX_Vbroadcastf64x2_ymm_k1z_m128 = 2701,
	EVEX_Vbroadcastf64x2_zmm_k1z_m128 = 2702,
	EVEX_Vbroadcastf32x8_zmm_k1z_m256 = 2703,
	EVEX_Vbroadcastf64x4_zmm_k1z_m256 = 2704,
	Pabsb_mm_mmm64 = 2705,
	Pabsb_xmm_xmmm128 = 2706,
	VEX_Vpabsb_xmm_xmmm128 = 2707,
	VEX_Vpabsb_ymm_ymmm256 = 2708,
	EVEX_Vpabsb_xmm_k1z_xmmm128 = 2709,
	EVEX_Vpabsb_ymm_k1z_ymmm256 = 2710,
	EVEX_Vpabsb_zmm_k1z_zmmm512 = 2711,
	Pabsw_mm_mmm64 = 2712,
	Pabsw_xmm_xmmm128 = 2713,
	VEX_Vpabsw_xmm_xmmm128 = 2714,
	VEX_Vpabsw_ymm_ymmm256 = 2715,
	EVEX_Vpabsw_xmm_k1z_xmmm128 = 2716,
	EVEX_Vpabsw_ymm_k1z_ymmm256 = 2717,
	EVEX_Vpabsw_zmm_k1z_zmmm512 = 2718,
	Pabsd_mm_mmm64 = 2719,
	Pabsd_xmm_xmmm128 = 2720,
	VEX_Vpabsd_xmm_xmmm128 = 2721,
	VEX_Vpabsd_ymm_ymmm256 = 2722,
	EVEX_Vpabsd_xmm_k1z_xmmm128b32 = 2723,
	EVEX_Vpabsd_ymm_k1z_ymmm256b32 = 2724,
	EVEX_Vpabsd_zmm_k1z_zmmm512b32 = 2725,
	EVEX_Vpabsq_xmm_k1z_xmmm128b64 = 2726,
	EVEX_Vpabsq_ymm_k1z_ymmm256b64 = 2727,
	EVEX_Vpabsq_zmm_k1z_zmmm512b64 = 2728,
	Pmovsxbw_xmm_xmmm64 = 2729,
	VEX_Vpmovsxbw_xmm_xmmm64 = 2730,
	VEX_Vpmovsxbw_ymm_xmmm128 = 2731,
	EVEX_Vpmovsxbw_xmm_k1z_xmmm64 = 2732,
	EVEX_Vpmovsxbw_ymm_k1z_xmmm128 = 2733,
	EVEX_Vpmovsxbw_zmm_k1z_ymmm256 = 2734,
	EVEX_Vpmovswb_xmmm64_k1z_xmm = 2735,
	EVEX_Vpmovswb_xmmm128_k1z_ymm = 2736,
	EVEX_Vpmovswb_ymmm256_k1z_zmm = 2737,
	Pmovsxbd_xmm_xmmm32 = 2738,
	VEX_Vpmovsxbd_xmm_xmmm32 = 2739,
	VEX_Vpmovsxbd_ymm_xmmm64 = 2740,
	EVEX_Vpmovsxbd_xmm_k1z_xmmm32 = 2741,
	EVEX_Vpmovsxbd_ymm_k1z_xmmm64 = 2742,
	EVEX_Vpmovsxbd_zmm_k1z_xmmm128 = 2743,
	EVEX_Vpmovsdb_xmmm32_k1z_xmm = 2744,
	EVEX_Vpmovsdb_xmmm64_k1z_ymm = 2745,
	EVEX_Vpmovsdb_xmmm128_k1z_zmm = 2746,
	Pmovsxbq_xmm_xmmm16 = 2747,
	VEX_Vpmovsxbq_xmm_xmmm16 = 2748,
	VEX_Vpmovsxbq_ymm_xmmm32 = 2749,
	EVEX_Vpmovsxbq_xmm_k1z_xmmm16 = 2750,
	EVEX_Vpmovsxbq_ymm_k1z_xmmm32 = 2751,
	EVEX_Vpmovsxbq_zmm_k1z_xmmm64 = 2752,
	EVEX_Vpmovsqb_xmmm16_k1z_xmm = 2753,
	EVEX_Vpmovsqb_xmmm32_k1z_ymm = 2754,
	EVEX_Vpmovsqb_xmmm64_k1z_zmm = 2755,
	Pmovsxwd_xmm_xmmm64 = 2756,
	VEX_Vpmovsxwd_xmm_xmmm64 = 2757,
	VEX_Vpmovsxwd_ymm_xmmm128 = 2758,
	EVEX_Vpmovsxwd_xmm_k1z_xmmm64 = 2759,
	EVEX_Vpmovsxwd_ymm_k1z_xmmm128 = 2760,
	EVEX_Vpmovsxwd_zmm_k1z_ymmm256 = 2761,
	EVEX_Vpmovsdw_xmmm64_k1z_xmm = 2762,
	EVEX_Vpmovsdw_xmmm128_k1z_ymm = 2763,
	EVEX_Vpmovsdw_ymmm256_k1z_zmm = 2764,
	Pmovsxwq_xmm_xmmm32 = 2765,
	VEX_Vpmovsxwq_xmm_xmmm32 = 2766,
	VEX_Vpmovsxwq_ymm_xmmm64 = 2767,
	EVEX_Vpmovsxwq_xmm_k1z_xmmm32 = 2768,
	EVEX_Vpmovsxwq_ymm_k1z_xmmm64 = 2769,
	EVEX_Vpmovsxwq_zmm_k1z_xmmm128 = 2770,
	EVEX_Vpmovsqw_xmmm32_k1z_xmm = 2771,
	EVEX_Vpmovsqw_xmmm64_k1z_ymm = 2772,
	EVEX_Vpmovsqw_xmmm128_k1z_zmm = 2773,
	Pmovsxdq_xmm_xmmm64 = 2774,
	VEX_Vpmovsxdq_xmm_xmmm64 = 2775,
	VEX_Vpmovsxdq_ymm_xmmm128 = 2776,
	EVEX_Vpmovsxdq_xmm_k1z_xmmm64 = 2777,
	EVEX_Vpmovsxdq_ymm_k1z_xmmm128 = 2778,
	EVEX_Vpmovsxdq_zmm_k1z_ymmm256 = 2779,
	EVEX_Vpmovsqd_xmmm64_k1z_xmm = 2780,
	EVEX_Vpmovsqd_xmmm128_k1z_ymm = 2781,
	EVEX_Vpmovsqd_ymmm256_k1z_zmm = 2782,
	EVEX_Vptestmb_k_k1_xmm_xmmm128 = 2783,
	EVEX_Vptestmb_k_k1_ymm_ymmm256 = 2784,
	EVEX_Vptestmb_k_k1_zmm_zmmm512 = 2785,
	EVEX_Vptestmw_k_k1_xmm_xmmm128 = 2786,
	EVEX_Vptestmw_k_k1_ymm_ymmm256 = 2787,
	EVEX_Vptestmw_k_k1_zmm_zmmm512 = 2788,
	EVEX_Vptestnmb_k_k1_xmm_xmmm128 = 2789,
	EVEX_Vptestnmb_k_k1_ymm_ymmm256 = 2790,
	EVEX_Vptestnmb_k_k1_zmm_zmmm512 = 2791,
	EVEX_Vptestnmw_k_k1_xmm_xmmm128 = 2792,
	EVEX_Vptestnmw_k_k1_ymm_ymmm256 = 2793,
	EVEX_Vptestnmw_k_k1_zmm_zmmm512 = 2794,
	EVEX_Vptestmd_k_k1_xmm_xmmm128b32 = 2795,
	EVEX_Vptestmd_k_k1_ymm_ymmm256b32 = 2796,
	EVEX_Vptestmd_k_k1_zmm_zmmm512b32 = 2797,
	EVEX_Vptestmq_k_k1_xmm_xmmm128b64 = 2798,
	EVEX_Vptestmq_k_k1_ymm_ymmm256b64 = 2799,
	EVEX_Vptestmq_k_k1_zmm_zmmm512b64 = 2800,
	EVEX_Vptestnmd_k_k1_xmm_xmmm128b32 = 2801,
	EVEX_Vptestnmd_k_k1_ymm_ymmm256b32 = 2802,
	EVEX_Vptestnmd_k_k1_zmm_zmmm512b32 = 2803,
	EVEX_Vptestnmq_k_k1_xmm_xmmm128b64 = 2804,
	EVEX_Vptestnmq_k_k1_ymm_ymmm256b64 = 2805,
	EVEX_Vptestnmq_k_k1_zmm_zmmm512b64 = 2806,
	Pmuldq_xmm_xmmm128 = 2807,
	VEX_Vpmuldq_xmm_xmm_xmmm128 = 2808,
	VEX_Vpmuldq_ymm_ymm_ymmm256 = 2809,
	EVEX_Vpmuldq_xmm_k1z_xmm_xmmm128b64 = 2810,
	EVEX_Vpmuldq_ymm_k1z_ymm_ymmm256b64 = 2811,
	EVEX_Vpmuldq_zmm_k1z_zmm_zmmm512b64 = 2812,
	EVEX_Vpmovm2b_xmm_k = 2813,
	EVEX_Vpmovm2b_ymm_k = 2814,
	EVEX_Vpmovm2b_zmm_k = 2815,
	EVEX_Vpmovm2w_xmm_k = 2816,
	EVEX_Vpmovm2w_ymm_k = 2817,
	EVEX_Vpmovm2w_zmm_k = 2818,
	Pcmpeqq_xmm_xmmm128 = 2819,
	VEX_Vpcmpeqq_xmm_xmm_xmmm128 = 2820,
	VEX_Vpcmpeqq_ymm_ymm_ymmm256 = 2821,
	EVEX_Vpcmpeqq_k_k1_xmm_xmmm128b64 = 2822,
	EVEX_Vpcmpeqq_k_k1_ymm_ymmm256b64 = 2823,
	EVEX_Vpcmpeqq_k_k1_zmm_zmmm512b64 = 2824,
	EVEX_Vpmovb2m_k_xmm = 2825,
	EVEX_Vpmovb2m_k_ymm = 2826,
	EVEX_Vpmovb2m_k_zmm = 2827,
	EVEX_Vpmovw2m_k_xmm = 2828,
	EVEX_Vpmovw2m_k_ymm = 2829,
	EVEX_Vpmovw2m_k_zmm = 2830,
	Movntdqa_xmm_m128 = 2831,
	VEX_Vmovntdqa_xmm_m128 = 2832,
	VEX_Vmovntdqa_ymm_m256 = 2833,
	EVEX_Vmovntdqa_xmm_m128 = 2834,
	EVEX_Vmovntdqa_ymm_m256 = 2835,
	EVEX_Vmovntdqa_zmm_m512 = 2836,
	EVEX_Vpbroadcastmb2q_xmm_k = 2837,
	EVEX_Vpbroadcastmb2q_ymm_k = 2838,
	EVEX_Vpbroadcastmb2q_zmm_k = 2839,
	Packusdw_xmm_xmmm128 = 2840,
	VEX_Vpackusdw_xmm_xmm_xmmm128 = 2841,
	VEX_Vpackusdw_ymm_ymm_ymmm256 = 2842,
	EVEX_Vpackusdw_xmm_k1z_xmm_xmmm128b32 = 2843,
	EVEX_Vpackusdw_ymm_k1z_ymm_ymmm256b32 = 2844,
	EVEX_Vpackusdw_zmm_k1z_zmm_zmmm512b32 = 2845,
	VEX_Vmaskmovps_xmm_xmm_m128 = 2846,
	VEX_Vmaskmovps_ymm_ymm_m256 = 2847,
	EVEX_Vscalefps_xmm_k1z_xmm_xmmm128b32 = 2848,
	EVEX_Vscalefps_ymm_k1z_ymm_ymmm256b32 = 2849,
	EVEX_Vscalefps_zmm_k1z_zmm_zmmm512b32_er = 2850,
	EVEX_Vscalefpd_xmm_k1z_xmm_xmmm128b64 = 2851,
	EVEX_Vscalefpd_ymm_k1z_ymm_ymmm256b64 = 2852,
	EVEX_Vscalefpd_zmm_k1z_zmm_zmmm512b64_er = 2853,
	VEX_Vmaskmovpd_xmm_xmm_m128 = 2854,
	VEX_Vmaskmovpd_ymm_ymm_m256 = 2855,
	EVEX_Vscalefss_xmm_k1z_xmm_xmmm32_er = 2856,
	EVEX_Vscalefsd_xmm_k1z_xmm_xmmm64_er = 2857,
	VEX_Vmaskmovps_m128_xmm_xmm = 2858,
	VEX_Vmaskmovps_m256_ymm_ymm = 2859,
	VEX_Vmaskmovpd_m128_xmm_xmm = 2860,
	VEX_Vmaskmovpd_m256_ymm_ymm = 2861,
	Pmovzxbw_xmm_xmmm64 = 2862,
	VEX_Vpmovzxbw_xmm_xmmm64 = 2863,
	VEX_Vpmovzxbw_ymm_xmmm128 = 2864,
	EVEX_Vpmovzxbw_xmm_k1z_xmmm64 = 2865,
	EVEX_Vpmovzxbw_ymm_k1z_xmmm128 = 2866,
	EVEX_Vpmovzxbw_zmm_k1z_ymmm256 = 2867,
	EVEX_Vpmovwb_xmmm64_k1z_xmm = 2868,
	EVEX_Vpmovwb_xmmm128_k1z_ymm = 2869,
	EVEX_Vpmovwb_ymmm256_k1z_zmm = 2870,
	Pmovzxbd_xmm_xmmm32 = 2871,
	VEX_Vpmovzxbd_xmm_xmmm32 = 2872,
	VEX_Vpmovzxbd_ymm_xmmm64 = 2873,
	EVEX_Vpmovzxbd_xmm_k1z_xmmm32 = 2874,
	EVEX_Vpmovzxbd_ymm_k1z_xmmm64 = 2875,
	EVEX_Vpmovzxbd_zmm_k1z_xmmm128 = 2876,
	EVEX_Vpmovdb_xmmm32_k1z_xmm = 2877,
	EVEX_Vpmovdb_xmmm64_k1z_ymm = 2878,
	EVEX_Vpmovdb_xmmm128_k1z_zmm = 2879,
	Pmovzxbq_xmm_xmmm16 = 2880,
	VEX_Vpmovzxbq_xmm_xmmm16 = 2881,
	VEX_Vpmovzxbq_ymm_xmmm32 = 2882,
	EVEX_Vpmovzxbq_xmm_k1z_xmmm16 = 2883,
	EVEX_Vpmovzxbq_ymm_k1z_xmmm32 = 2884,
	EVEX_Vpmovzxbq_zmm_k1z_xmmm64 = 2885,
	EVEX_Vpmovqb_xmmm16_k1z_xmm = 2886,
	EVEX_Vpmovqb_xmmm32_k1z_ymm = 2887,
	EVEX_Vpmovqb_xmmm64_k1z_zmm = 2888,
	Pmovzxwd_xmm_xmmm64 = 2889,
	VEX_Vpmovzxwd_xmm_xmmm64 = 2890,
	VEX_Vpmovzxwd_ymm_xmmm128 = 2891,
	EVEX_Vpmovzxwd_xmm_k1z_xmmm64 = 2892,
	EVEX_Vpmovzxwd_ymm_k1z_xmmm128 = 2893,
	EVEX_Vpmovzxwd_zmm_k1z_ymmm256 = 2894,
	EVEX_Vpmovdw_xmmm64_k1z_xmm = 2895,
	EVEX_Vpmovdw_xmmm128_k1z_ymm = 2896,
	EVEX_Vpmovdw_ymmm256_k1z_zmm = 2897,
	Pmovzxwq_xmm_xmmm32 = 2898,
	VEX_Vpmovzxwq_xmm_xmmm32 = 2899,
	VEX_Vpmovzxwq_ymm_xmmm64 = 2900,
	EVEX_Vpmovzxwq_xmm_k1z_xmmm32 = 2901,
	EVEX_Vpmovzxwq_ymm_k1z_xmmm64 = 2902,
	EVEX_Vpmovzxwq_zmm_k1z_xmmm128 = 2903,
	EVEX_Vpmovqw_xmmm32_k1z_xmm = 2904,
	EVEX_Vpmovqw_xmmm64_k1z_ymm = 2905,
	EVEX_Vpmovqw_xmmm128_k1z_zmm = 2906,
	Pmovzxdq_xmm_xmmm64 = 2907,
	VEX_Vpmovzxdq_xmm_xmmm64 = 2908,
	VEX_Vpmovzxdq_ymm_xmmm128 = 2909,
	EVEX_Vpmovzxdq_xmm_k1z_xmmm64 = 2910,
	EVEX_Vpmovzxdq_ymm_k1z_xmmm128 = 2911,
	EVEX_Vpmovzxdq_zmm_k1z_ymmm256 = 2912,
	EVEX_Vpmovqd_xmmm64_k1z_xmm = 2913,
	EVEX_Vpmovqd_xmmm128_k1z_ymm = 2914,
	EVEX_Vpmovqd_ymmm256_k1z_zmm = 2915,
	VEX_Vpermd_ymm_ymm_ymmm256 = 2916,
	EVEX_Vpermd_ymm_k1z_ymm_ymmm256b32 = 2917,
	EVEX_Vpermd_zmm_k1z_zmm_zmmm512b32 = 2918,
	EVEX_Vpermq_ymm_k1z_ymm_ymmm256b64 = 2919,
	EVEX_Vpermq_zmm_k1z_zmm_zmmm512b64 = 2920,
	Pcmpgtq_xmm_xmmm128 = 2921,
	VEX_Vpcmpgtq_xmm_xmm_xmmm128 = 2922,
	VEX_Vpcmpgtq_ymm_ymm_ymmm256 = 2923,
	EVEX_Vpcmpgtq_k_k1_xmm_xmmm128b64 = 2924,
	EVEX_Vpcmpgtq_k_k1_ymm_ymmm256b64 = 2925,
	EVEX_Vpcmpgtq_k_k1_zmm_zmmm512b64 = 2926,
	Pminsb_xmm_xmmm128 = 2927,
	VEX_Vpminsb_xmm_xmm_xmmm128 = 2928,
	VEX_Vpminsb_ymm_ymm_ymmm256 = 2929,
	EVEX_Vpminsb_xmm_k1z_xmm_xmmm128 = 2930,
	EVEX_Vpminsb_ymm_k1z_ymm_ymmm256 = 2931,
	EVEX_Vpminsb_zmm_k1z_zmm_zmmm512 = 2932,
	EVEX_Vpmovm2d_xmm_k = 2933,
	EVEX_Vpmovm2d_ymm_k = 2934,
	EVEX_Vpmovm2d_zmm_k = 2935,
	EVEX_Vpmovm2q_xmm_k = 2936,
	EVEX_Vpmovm2q_ymm_k = 2937,
	EVEX_Vpmovm2q_zmm_k = 2938,
	Pminsd_xmm_xmmm128 = 2939,
	VEX_Vpminsd_xmm_xmm_xmmm128 = 2940,
	VEX_Vpminsd_ymm_ymm_ymmm256 = 2941,
	EVEX_Vpminsd_xmm_k1z_xmm_xmmm128b32 = 2942,
	EVEX_Vpminsd_ymm_k1z_ymm_ymmm256b32 = 2943,
	EVEX_Vpminsd_zmm_k1z_zmm_zmmm512b32 = 2944,
	EVEX_Vpminsq_xmm_k1z_xmm_xmmm128b64 = 2945,
	EVEX_Vpminsq_ymm_k1z_ymm_ymmm256b64 = 2946,
	EVEX_Vpminsq_zmm_k1z_zmm_zmmm512b64 = 2947,
	EVEX_Vpmovd2m_k_xmm = 2948,
	EVEX_Vpmovd2m_k_ymm = 2949,
	EVEX_Vpmovd2m_k_zmm = 2950,
	EVEX_Vpmovq2m_k_xmm = 2951,
	EVEX_Vpmovq2m_k_ymm = 2952,
	EVEX_Vpmovq2m_k_zmm = 2953,
	Pminuw_xmm_xmmm128 = 2954,
	VEX_Vpminuw_xmm_xmm_xmmm128 = 2955,
	VEX_Vpminuw_ymm_ymm_ymmm256 = 2956,
	EVEX_Vpminuw_xmm_k1z_xmm_xmmm128 = 2957,
	EVEX_Vpminuw_ymm_k1z_ymm_ymmm256 = 2958,
	EVEX_Vpminuw_zmm_k1z_zmm_zmmm512 = 2959,
	EVEX_Vpbroadcastmw2d_xmm_k = 2960,
	EVEX_Vpbroadcastmw2d_ymm_k = 2961,
	EVEX_Vpbroadcastmw2d_zmm_k = 2962,
	Pminud_xmm_xmmm128 = 2963,
	VEX_Vpminud_xmm_xmm_xmmm128 = 2964,
	VEX_Vpminud_ymm_ymm_ymmm256 = 2965,
	EVEX_Vpminud_xmm_k1z_xmm_xmmm128b32 = 2966,
	EVEX_Vpminud_ymm_k1z_ymm_ymmm256b32 = 2967,
	EVEX_Vpminud_zmm_k1z_zmm_zmmm512b32 = 2968,
	EVEX_Vpminuq_xmm_k1z_xmm_xmmm128b64 = 2969,
	EVEX_Vpminuq_ymm_k1z_ymm_ymmm256b64 = 2970,
	EVEX_Vpminuq_zmm_k1z_zmm_zmmm512b64 = 2971,
	Pmaxsb_xmm_xmmm128 = 2972,
	VEX_Vpmaxsb_xmm_xmm_xmmm128 = 2973,
	VEX_Vpmaxsb_ymm_ymm_ymmm256 = 2974,
	EVEX_Vpmaxsb_xmm_k1z_xmm_xmmm128 = 2975,
	EVEX_Vpmaxsb_ymm_k1z_ymm_ymmm256 = 2976,
	EVEX_Vpmaxsb_zmm_k1z_zmm_zmmm512 = 2977,
	Pmaxsd_xmm_xmmm128 = 2978,
	VEX_Vpmaxsd_xmm_xmm_xmmm128 = 2979,
	VEX_Vpmaxsd_ymm_ymm_ymmm256 = 2980,
	EVEX_Vpmaxsd_xmm_k1z_xmm_xmmm128b32 = 2981,
	EVEX_Vpmaxsd_ymm_k1z_ymm_ymmm256b32 = 2982,
	EVEX_Vpmaxsd_zmm_k1z_zmm_zmmm512b32 = 2983,
	EVEX_Vpmaxsq_xmm_k1z_xmm_xmmm128b64 = 2984,
	EVEX_Vpmaxsq_ymm_k1z_ymm_ymmm256b64 = 2985,
	EVEX_Vpmaxsq_zmm_k1z_zmm_zmmm512b64 = 2986,
	Pmaxuw_xmm_xmmm128 = 2987,
	VEX_Vpmaxuw_xmm_xmm_xmmm128 = 2988,
	VEX_Vpmaxuw_ymm_ymm_ymmm256 = 2989,
	EVEX_Vpmaxuw_xmm_k1z_xmm_xmmm128 = 2990,
	EVEX_Vpmaxuw_ymm_k1z_ymm_ymmm256 = 2991,
	EVEX_Vpmaxuw_zmm_k1z_zmm_zmmm512 = 2992,
	Pmaxud_xmm_xmmm128 = 2993,
	VEX_Vpmaxud_xmm_xmm_xmmm128 = 2994,
	VEX_Vpmaxud_ymm_ymm_ymmm256 = 2995,
	EVEX_Vpmaxud_xmm_k1z_xmm_xmmm128b32 = 2996,
	EVEX_Vpmaxud_ymm_k1z_ymm_ymmm256b32 = 2997,
	EVEX_Vpmaxud_zmm_k1z_zmm_zmmm512b32 = 2998,
	EVEX_Vpmaxuq_xmm_k1z_xmm_xmmm128b64 = 2999,
	EVEX_Vpmaxuq_ymm_k1z_ymm_ymmm256b64 = 3000,
	EVEX_Vpmaxuq_zmm_k1z_zmm_zmmm512b64 = 3001,
	Pmulld_xmm_xmmm128 = 3002,
	VEX_Vpmulld_xmm_xmm_xmmm128 = 3003,
	VEX_Vpmulld_ymm_ymm_ymmm256 = 3004,
	EVEX_Vpmulld_xmm_k1z_xmm_xmmm128b32 = 3005,
	EVEX_Vpmulld_ymm_k1z_ymm_ymmm256b32 = 3006,
	EVEX_Vpmulld_zmm_k1z_zmm_zmmm512b32 = 3007,
	EVEX_Vpmullq_xmm_k1z_xmm_xmmm128b64 = 3008,
	EVEX_Vpmullq_ymm_k1z_ymm_ymmm256b64 = 3009,
	EVEX_Vpmullq_zmm_k1z_zmm_zmmm512b64 = 3010,
	Phminposuw_xmm_xmmm128 = 3011,
	VEX_Vphminposuw_xmm_xmmm128 = 3012,
	EVEX_Vgetexpps_xmm_k1z_xmmm128b32 = 3013,
	EVEX_Vgetexpps_ymm_k1z_ymmm256b32 = 3014,
	EVEX_Vgetexpps_zmm_k1z_zmmm512b32_sae = 3015,
	EVEX_Vgetexppd_xmm_k1z_xmmm128b64 = 3016,
	EVEX_Vgetexppd_ymm_k1z_ymmm256b64 = 3017,
	EVEX_Vgetexppd_zmm_k1z_zmmm512b64_sae = 3018,
	EVEX_Vgetexpss_xmm_k1z_xmm_xmmm32_sae = 3019,
	EVEX_Vgetexpsd_xmm_k1z_xmm_xmmm64_sae = 3020,
	EVEX_Vplzcntd_xmm_k1z_xmmm128b32 = 3021,
	EVEX_Vplzcntd_ymm_k1z_ymmm256b32 = 3022,
	EVEX_Vplzcntd_zmm_k1z_zmmm512b32 = 3023,
	EVEX_Vplzcntq_xmm_k1z_xmmm128b64 = 3024,
	EVEX_Vplzcntq_ymm_k1z_ymmm256b64 = 3025,
	EVEX_Vplzcntq_zmm_k1z_zmmm512b64 = 3026,
	VEX_Vpsrlvd_xmm_xmm_xmmm128 = 3027,
	VEX_Vpsrlvd_ymm_ymm_ymmm256 = 3028,
	VEX_Vpsrlvq_xmm_xmm_xmmm128 = 3029,
	VEX_Vpsrlvq_ymm_ymm_ymmm256 = 3030,
	EVEX_Vpsrlvd_xmm_k1z_xmm_xmmm128b32 = 3031,
	EVEX_Vpsrlvd_ymm_k1z_ymm_ymmm256b32 = 3032,
	EVEX_Vpsrlvd_zmm_k1z_zmm_zmmm512b32 = 3033,
	EVEX_Vpsrlvq_xmm_k1z_xmm_xmmm128b64 = 3034,
	EVEX_Vpsrlvq_ymm_k1z_ymm_ymmm256b64 = 3035,
	EVEX_Vpsrlvq_zmm_k1z_zmm_zmmm512b64 = 3036,
	VEX_Vpsravd_xmm_xmm_xmmm128 = 3037,
	VEX_Vpsravd_ymm_ymm_ymmm256 = 3038,
	EVEX_Vpsravd_xmm_k1z_xmm_xmmm128b32 = 3039,
	EVEX_Vpsravd_ymm_k1z_ymm_ymmm256b32 = 3040,
	EVEX_Vpsravd_zmm_k1z_zmm_zmmm512b32 = 3041,
	EVEX_Vpsravq_xmm_k1z_xmm_xmmm128b64 = 3042,
	EVEX_Vpsravq_ymm_k1z_ymm_ymmm256b64 = 3043,
	EVEX_Vpsravq_zmm_k1z_zmm_zmmm512b64 = 3044,
	VEX_Vpsllvd_xmm_xmm_xmmm128 = 3045,
	VEX_Vpsllvd_ymm_ymm_ymmm256 = 3046,
	VEX_Vpsllvq_xmm_xmm_xmmm128 = 3047,
	VEX_Vpsllvq_ymm_ymm_ymmm256 = 3048,
	EVEX_Vpsllvd_xmm_k1z_xmm_xmmm128b32 = 3049,
	EVEX_Vpsllvd_ymm_k1z_ymm_ymmm256b32 = 3050,
	EVEX_Vpsllvd_zmm_k1z_zmm_zmmm512b32 = 3051,
	EVEX_Vpsllvq_xmm_k1z_xmm_xmmm128b64 = 3052,
	EVEX_Vpsllvq_ymm_k1z_ymm_ymmm256b64 = 3053,
	EVEX_Vpsllvq_zmm_k1z_zmm_zmmm512b64 = 3054,
	EVEX_Vrcp14ps_xmm_k1z_xmmm128b32 = 3055,
	EVEX_Vrcp14ps_ymm_k1z_ymmm256b32 = 3056,
	EVEX_Vrcp14ps_zmm_k1z_zmmm512b32 = 3057,
	EVEX_Vrcp14pd_xmm_k1z_xmmm128b64 = 3058,
	EVEX_Vrcp14pd_ymm_k1z_ymmm256b64 = 3059,
	EVEX_Vrcp14pd_zmm_k1z_zmmm512b64 = 3060,
	EVEX_Vrcp14ss_xmm_k1z_xmm_xmmm32 = 3061,
	EVEX_Vrcp14sd_xmm_k1z_xmm_xmmm64 = 3062,
	EVEX_Vrsqrt14ps_xmm_k1z_xmmm128b32 = 3063,
	EVEX_Vrsqrt14ps_ymm_k1z_ymmm256b32 = 3064,
	EVEX_Vrsqrt14ps_zmm_k1z_zmmm512b32 = 3065,
	EVEX_Vrsqrt14pd_xmm_k1z_xmmm128b64 = 3066,
	EVEX_Vrsqrt14pd_ymm_k1z_ymmm256b64 = 3067,
	EVEX_Vrsqrt14pd_zmm_k1z_zmmm512b64 = 3068,
	EVEX_Vrsqrt14ss_xmm_k1z_xmm_xmmm32 = 3069,
	EVEX_Vrsqrt14sd_xmm_k1z_xmm_xmmm64 = 3070,
	EVEX_Vpdpbusd_xmm_k1z_xmm_xmmm128b32 = 3071,
	EVEX_Vpdpbusd_ymm_k1z_ymm_ymmm256b32 = 3072,
	EVEX_Vpdpbusd_zmm_k1z_zmm_zmmm512b32 = 3073,
	EVEX_Vpdpbusds_xmm_k1z_xmm_xmmm128b32 = 3074,
	EVEX_Vpdpbusds_ymm_k1z_ymm_ymmm256b32 = 3075,
	EVEX_Vpdpbusds_zmm_k1z_zmm_zmmm512b32 = 3076,
	EVEX_Vpdpwssd_xmm_k1z_xmm_xmmm128b32 = 3077,
	EVEX_Vpdpwssd_ymm_k1z_ymm_ymmm256b32 = 3078,
	EVEX_Vpdpwssd_zmm_k1z_zmm_zmmm512b32 = 3079,
	EVEX_Vdpbf16ps_xmm_k1z_xmm_xmmm128b32 = 3080,
	EVEX_Vdpbf16ps_ymm_k1z_ymm_ymmm256b32 = 3081,
	EVEX_Vdpbf16ps_zmm_k1z_zmm_zmmm512b32 = 3082,
	EVEX_Vp4dpwssd_zmm_k1z_zmmp3_m128 = 3083,
	EVEX_Vpdpwssds_xmm_k1z_xmm_xmmm128b32 = 3084,
	EVEX_Vpdpwssds_ymm_k1z_ymm_ymmm256b32 = 3085,
	EVEX_Vpdpwssds_zmm_k1z_zmm_zmmm512b32 = 3086,
	EVEX_Vp4dpwssds_zmm_k1z_zmmp3_m128 = 3087,
	EVEX_Vpopcntb_xmm_k1z_xmmm128 = 3088,
	EVEX_Vpopcntb_ymm_k1z_ymmm256 = 3089,
	EVEX_Vpopcntb_zmm_k1z_zmmm512 = 3090,
	EVEX_Vpopcntw_xmm_k1z_xmmm128 = 3091,
	EVEX_Vpopcntw_ymm_k1z_ymmm256 = 3092,
	EVEX_Vpopcntw_zmm_k1z_zmmm512 = 3093,
	EVEX_Vpopcntd_xmm_k1z_xmmm128b32 = 3094,
	EVEX_Vpopcntd_ymm_k1z_ymmm256b32 = 3095,
	EVEX_Vpopcntd_zmm_k1z_zmmm512b32 = 3096,
	EVEX_Vpopcntq_xmm_k1z_xmmm128b64 = 3097,
	EVEX_Vpopcntq_ymm_k1z_ymmm256b64 = 3098,
	EVEX_Vpopcntq_zmm_k1z_zmmm512b64 = 3099,
	VEX_Vpbroadcastd_xmm_xmmm32 = 3100,
	VEX_Vpbroadcastd_ymm_xmmm32 = 3101,
	EVEX_Vpbroadcastd_xmm_k1z_xmmm32 = 3102,
	EVEX_Vpbroadcastd_ymm_k1z_xmmm32 = 3103,
	EVEX_Vpbroadcastd_zmm_k1z_xmmm32 = 3104,
	VEX_Vpbroadcastq_xmm_xmmm64 = 3105,
	VEX_Vpbroadcastq_ymm_xmmm64 = 3106,
	EVEX_Vbroadcasti32x2_xmm_k1z_xmmm64 = 3107,
	EVEX_Vbroadcasti32x2_ymm_k1z_xmmm64 = 3108,
	EVEX_Vbroadcasti32x2_zmm_k1z_xmmm64 = 3109,
	EVEX_Vpbroadcastq_xmm_k1z_xmmm64 = 3110,
	EVEX_Vpbroadcastq_ymm_k1z_xmmm64 = 3111,
	EVEX_Vpbroadcastq_zmm_k1z_xmmm64 = 3112,
	VEX_Vbroadcasti128_ymm_m128 = 3113,
	EVEX_Vbroadcasti32x4_ymm_k1z_m128 = 3114,
	EVEX_Vbroadcasti32x4_zmm_k1z_m128 = 3115,
	EVEX_Vbroadcasti64x2_ymm_k1z_m128 = 3116,
	EVEX_Vbroadcasti64x2_zmm_k1z_m128 = 3117,
	EVEX_Vbroadcasti32x8_zmm_k1z_m256 = 3118,
	EVEX_Vbroadcasti64x4_zmm_k1z_m256 = 3119,
	EVEX_Vpexpandb_xmm_k1z_xmmm128 = 3120,
	EVEX_Vpexpandb_ymm_k1z_ymmm256 = 3121,
	EVEX_Vpexpandb_zmm_k1z_zmmm512 = 3122,
	EVEX_Vpexpandw_xmm_k1z_xmmm128 = 3123,
	EVEX_Vpexpandw_ymm_k1z_ymmm256 = 3124,
	EVEX_Vpexpandw_zmm_k1z_zmmm512 = 3125,
	EVEX_Vpcompressb_xmmm128_k1z_xmm = 3126,
	EVEX_Vpcompressb_ymmm256_k1z_ymm = 3127,
	EVEX_Vpcompressb_zmmm512_k1z_zmm = 3128,
	EVEX_Vpcompressw_xmmm128_k1z_xmm = 3129,
	EVEX_Vpcompressw_ymmm256_k1z_ymm = 3130,
	EVEX_Vpcompressw_zmmm512_k1z_zmm = 3131,
	EVEX_Vpblendmd_xmm_k1z_xmm_xmmm128b32 = 3132,
	EVEX_Vpblendmd_ymm_k1z_ymm_ymmm256b32 = 3133,
	EVEX_Vpblendmd_zmm_k1z_zmm_zmmm512b32 = 3134,
	EVEX_Vpblendmq_xmm_k1z_xmm_xmmm128b64 = 3135,
	EVEX_Vpblendmq_ymm_k1z_ymm_ymmm256b64 = 3136,
	EVEX_Vpblendmq_zmm_k1z_zmm_zmmm512b64 = 3137,
	EVEX_Vblendmps_xmm_k1z_xmm_xmmm128b32 = 3138,
	EVEX_Vblendmps_ymm_k1z_ymm_ymmm256b32 = 3139,
	EVEX_Vblendmps_zmm_k1z_zmm_zmmm512b32 = 3140,
	EVEX_Vblendmpd_xmm_k1z_xmm_xmmm128b64 = 3141,
	EVEX_Vblendmpd_ymm_k1z_ymm_ymmm256b64 = 3142,
	EVEX_Vblendmpd_zmm_k1z_zmm_zmmm512b64 = 3143,
	EVEX_Vpblendmb_xmm_k1z_xmm_xmmm128 = 3144,
	EVEX_Vpblendmb_ymm_k1z_ymm_ymmm256 = 3145,
	EVEX_Vpblendmb_zmm_k1z_zmm_zmmm512 = 3146,
	EVEX_Vpblendmw_xmm_k1z_xmm_xmmm128 = 3147,
	EVEX_Vpblendmw_ymm_k1z_ymm_ymmm256 = 3148,
	EVEX_Vpblendmw_zmm_k1z_zmm_zmmm512 = 3149,
	EVEX_Vp2intersectd_kp1_xmm_xmmm128b32 = 3150,
	EVEX_Vp2intersectd_kp1_ymm_ymmm256b32 = 3151,
	EVEX_Vp2intersectd_kp1_zmm_zmmm512b32 = 3152,
	EVEX_Vp2intersectq_kp1_xmm_xmmm128b64 = 3153,
	EVEX_Vp2intersectq_kp1_ymm_ymmm256b64 = 3154,
	EVEX_Vp2intersectq_kp1_zmm_zmmm512b64 = 3155,
	EVEX_Vpshldvw_xmm_k1z_xmm_xmmm128 = 3156,
	EVEX_Vpshldvw_ymm_k1z_ymm_ymmm256 = 3157,
	EVEX_Vpshldvw_zmm_k1z_zmm_zmmm512 = 3158,
	EVEX_Vpshldvd_xmm_k1z_xmm_xmmm128b32 = 3159,
	EVEX_Vpshldvd_ymm_k1z_ymm_ymmm256b32 = 3160,
	EVEX_Vpshldvd_zmm_k1z_zmm_zmmm512b32 = 3161,
	EVEX_Vpshldvq_xmm_k1z_xmm_xmmm128b64 = 3162,
	EVEX_Vpshldvq_ymm_k1z_ymm_ymmm256b64 = 3163,
	EVEX_Vpshldvq_zmm_k1z_zmm_zmmm512b64 = 3164,
	EVEX_Vpshrdvw_xmm_k1z_xmm_xmmm128 = 3165,
	EVEX_Vpshrdvw_ymm_k1z_ymm_ymmm256 = 3166,
	EVEX_Vpshrdvw_zmm_k1z_zmm_zmmm512 = 3167,
	EVEX_Vcvtneps2bf16_xmm_k1z_xmmm128b32 = 3168,
	EVEX_Vcvtneps2bf16_xmm_k1z_ymmm256b32 = 3169,
	EVEX_Vcvtneps2bf16_ymm_k1z_zmmm512b32 = 3170,
	EVEX_Vcvtne2ps2bf16_xmm_k1z_xmm_xmmm128b32 = 3171,
	EVEX_Vcvtne2ps2bf16_ymm_k1z_ymm_ymmm256b32 = 3172,
	EVEX_Vcvtne2ps2bf16_zmm_k1z_zmm_zmmm512b32 = 3173,
	EVEX_Vpshrdvd_xmm_k1z_xmm_xmmm128b32 = 3174,
	EVEX_Vpshrdvd_ymm_k1z_ymm_ymmm256b32 = 3175,
	EVEX_Vpshrdvd_zmm_k1z_zmm_zmmm512b32 = 3176,
	EVEX_Vpshrdvq_xmm_k1z_xmm_xmmm128b64 = 3177,
	EVEX_Vpshrdvq_ymm_k1z_ymm_ymmm256b64 = 3178,
	EVEX_Vpshrdvq_zmm_k1z_zmm_zmmm512b64 = 3179,
	EVEX_Vpermi2b_xmm_k1z_xmm_xmmm128 = 3180,
	EVEX_Vpermi2b_ymm_k1z_ymm_ymmm256 = 3181,
	EVEX_Vpermi2b_zmm_k1z_zmm_zmmm512 = 3182,
	EVEX_Vpermi2w_xmm_k1z_xmm_xmmm128 = 3183,
	EVEX_Vpermi2w_ymm_k1z_ymm_ymmm256 = 3184,
	EVEX_Vpermi2w_zmm_k1z_zmm_zmmm512 = 3185,
	EVEX_Vpermi2d_xmm_k1z_xmm_xmmm128b32 = 3186,
	EVEX_Vpermi2d_ymm_k1z_ymm_ymmm256b32 = 3187,
	EVEX_Vpermi2d_zmm_k1z_zmm_zmmm512b32 = 3188,
	EVEX_Vpermi2q_xmm_k1z_xmm_xmmm128b64 = 3189,
	EVEX_Vpermi2q_ymm_k1z_ymm_ymmm256b64 = 3190,
	EVEX_Vpermi2q_zmm_k1z_zmm_zmmm512b64 = 3191,
	EVEX_Vpermi2ps_xmm_k1z_xmm_xmmm128b32 = 3192,
	EVEX_Vpermi2ps_ymm_k1z_ymm_ymmm256b32 = 3193,
	EVEX_Vpermi2ps_zmm_k1z_zmm_zmmm512b32 = 3194,
	EVEX_Vpermi2pd_xmm_k1z_xmm_xmmm128b64 = 3195,
	EVEX_Vpermi2pd_ymm_k1z_ymm_ymmm256b64 = 3196,
	EVEX_Vpermi2pd_zmm_k1z_zmm_zmmm512b64 = 3197,
	VEX_Vpbroadcastb_xmm_xmmm8 = 3198,
	VEX_Vpbroadcastb_ymm_xmmm8 = 3199,
	EVEX_Vpbroadcastb_xmm_k1z_xmmm8 = 3200,
	EVEX_Vpbroadcastb_ymm_k1z_xmmm8 = 3201,
	EVEX_Vpbroadcastb_zmm_k1z_xmmm8 = 3202,
	VEX_Vpbroadcastw_xmm_xmmm16 = 3203,
	VEX_Vpbroadcastw_ymm_xmmm16 = 3204,
	EVEX_Vpbroadcastw_xmm_k1z_xmmm16 = 3205,
	EVEX_Vpbroadcastw_ymm_k1z_xmmm16 = 3206,
	EVEX_Vpbroadcastw_zmm_k1z_xmmm16 = 3207,
	EVEX_Vpbroadcastb_xmm_k1z_r32 = 3208,
	EVEX_Vpbroadcastb_ymm_k1z_r32 = 3209,
	EVEX_Vpbroadcastb_zmm_k1z_r32 = 3210,
	EVEX_Vpbroadcastw_xmm_k1z_r32 = 3211,
	EVEX_Vpbroadcastw_ymm_k1z_r32 = 3212,
	EVEX_Vpbroadcastw_zmm_k1z_r32 = 3213,
	EVEX_Vpbroadcastd_xmm_k1z_r32 = 3214,
	EVEX_Vpbroadcastd_ymm_k1z_r32 = 3215,
	EVEX_Vpbroadcastd_zmm_k1z_r32 = 3216,
	EVEX_Vpbroadcastq_xmm_k1z_r64 = 3217,
	EVEX_Vpbroadcastq_ymm_k1z_r64 = 3218,
	EVEX_Vpbroadcastq_zmm_k1z_r64 = 3219,
	EVEX_Vpermt2b_xmm_k1z_xmm_xmmm128 = 3220,
	EVEX_Vpermt2b_ymm_k1z_ymm_ymmm256 = 3221,
	EVEX_Vpermt2b_zmm_k1z_zmm_zmmm512 = 3222,
	EVEX_Vpermt2w_xmm_k1z_xmm_xmmm128 = 3223,
	EVEX_Vpermt2w_ymm_k1z_ymm_ymmm256 = 3224,
	EVEX_Vpermt2w_zmm_k1z_zmm_zmmm512 = 3225,
	EVEX_Vpermt2d_xmm_k1z_xmm_xmmm128b32 = 3226,
	EVEX_Vpermt2d_ymm_k1z_ymm_ymmm256b32 = 3227,
	EVEX_Vpermt2d_zmm_k1z_zmm_zmmm512b32 = 3228,
	EVEX_Vpermt2q_xmm_k1z_xmm_xmmm128b64 = 3229,
	EVEX_Vpermt2q_ymm_k1z_ymm_ymmm256b64 = 3230,
	EVEX_Vpermt2q_zmm_k1z_zmm_zmmm512b64 = 3231,
	EVEX_Vpermt2ps_xmm_k1z_xmm_xmmm128b32 = 3232,
	EVEX_Vpermt2ps_ymm_k1z_ymm_ymmm256b32 = 3233,
	EVEX_Vpermt2ps_zmm_k1z_zmm_zmmm512b32 = 3234,
	EVEX_Vpermt2pd_xmm_k1z_xmm_xmmm128b64 = 3235,
	EVEX_Vpermt2pd_ymm_k1z_ymm_ymmm256b64 = 3236,
	EVEX_Vpermt2pd_zmm_k1z_zmm_zmmm512b64 = 3237,
	Invept_r32_m128 = 3238,
	Invept_r64_m128 = 3239,
	Invvpid_r32_m128 = 3240,
	Invvpid_r64_m128 = 3241,
	Invpcid_r32_m128 = 3242,
	Invpcid_r64_m128 = 3243,
	EVEX_Vpmultishiftqb_xmm_k1z_xmm_xmmm128b64 = 3244,
	EVEX_Vpmultishiftqb_ymm_k1z_ymm_ymmm256b64 = 3245,
	EVEX_Vpmultishiftqb_zmm_k1z_zmm_zmmm512b64 = 3246,
	EVEX_Vexpandps_xmm_k1z_xmmm128 = 3247,
	EVEX_Vexpandps_ymm_k1z_ymmm256 = 3248,
	EVEX_Vexpandps_zmm_k1z_zmmm512 = 3249,
	EVEX_Vexpandpd_xmm_k1z_xmmm128 = 3250,
	EVEX_Vexpandpd_ymm_k1z_ymmm256 = 3251,
	EVEX_Vexpandpd_zmm_k1z_zmmm512 = 3252,
	EVEX_Vpexpandd_xmm_k1z_xmmm128 = 3253,
	EVEX_Vpexpandd_ymm_k1z_ymmm256 = 3254,
	EVEX_Vpexpandd_zmm_k1z_zmmm512 = 3255,
	EVEX_Vpexpandq_xmm_k1z_xmmm128 = 3256,
	EVEX_Vpexpandq_ymm_k1z_ymmm256 = 3257,
	EVEX_Vpexpandq_zmm_k1z_zmmm512 = 3258,
	EVEX_Vcompressps_xmmm128_k1z_xmm = 3259,
	EVEX_Vcompressps_ymmm256_k1z_ymm = 3260,
	EVEX_Vcompressps_zmmm512_k1z_zmm = 3261,
	EVEX_Vcompresspd_xmmm128_k1z_xmm = 3262,
	EVEX_Vcompresspd_ymmm256_k1z_ymm = 3263,
	EVEX_Vcompresspd_zmmm512_k1z_zmm = 3264,
	EVEX_Vpcompressd_xmmm128_k1z_xmm = 3265,
	EVEX_Vpcompressd_ymmm256_k1z_ymm = 3266,
	EVEX_Vpcompressd_zmmm512_k1z_zmm = 3267,
	EVEX_Vpcompressq_xmmm128_k1z_xmm = 3268,
	EVEX_Vpcompressq_ymmm256_k1z_ymm = 3269,
	EVEX_Vpcompressq_zmmm512_k1z_zmm = 3270,
	VEX_Vpmaskmovd_xmm_xmm_m128 = 3271,
	VEX_Vpmaskmovd_ymm_ymm_m256 = 3272,
	VEX_Vpmaskmovq_xmm_xmm_m128 = 3273,
	VEX_Vpmaskmovq_ymm_ymm_m256 = 3274,
	EVEX_Vpermb_xmm_k1z_xmm_xmmm128 = 3275,
	EVEX_Vpermb_ymm_k1z_ymm_ymmm256 = 3276,
	EVEX_Vpermb_zmm_k1z_zmm_zmmm512 = 3277,
	EVEX_Vpermw_xmm_k1z_xmm_xmmm128 = 3278,
	EVEX_Vpermw_ymm_k1z_ymm_ymmm256 = 3279,
	EVEX_Vpermw_zmm_k1z_zmm_zmmm512 = 3280,
	VEX_Vpmaskmovd_m128_xmm_xmm = 3281,
	VEX_Vpmaskmovd_m256_ymm_ymm = 3282,
	VEX_Vpmaskmovq_m128_xmm_xmm = 3283,
	VEX_Vpmaskmovq_m256_ymm_ymm = 3284,
	EVEX_Vpshufbitqmb_k_k1_xmm_xmmm128 = 3285,
	EVEX_Vpshufbitqmb_k_k1_ymm_ymmm256 = 3286,
	EVEX_Vpshufbitqmb_k_k1_zmm_zmmm512 = 3287,
	VEX_Vpgatherdd_xmm_vm32x_xmm = 3288,
	VEX_Vpgatherdd_ymm_vm32y_ymm = 3289,
	VEX_Vpgatherdq_xmm_vm32x_xmm = 3290,
	VEX_Vpgatherdq_ymm_vm32x_ymm = 3291,
	EVEX_Vpgatherdd_xmm_k1_vm32x = 3292,
	EVEX_Vpgatherdd_ymm_k1_vm32y = 3293,
	EVEX_Vpgatherdd_zmm_k1_vm32z = 3294,
	EVEX_Vpgatherdq_xmm_k1_vm32x = 3295,
	EVEX_Vpgatherdq_ymm_k1_vm32x = 3296,
	EVEX_Vpgatherdq_zmm_k1_vm32y = 3297,
	VEX_Vpgatherqd_xmm_vm64x_xmm = 3298,
	VEX_Vpgatherqd_xmm_vm64y_xmm = 3299,
	VEX_Vpgatherqq_xmm_vm64x_xmm = 3300,
	VEX_Vpgatherqq_ymm_vm64y_ymm = 3301,
	EVEX_Vpgatherqd_xmm_k1_vm64x = 3302,
	EVEX_Vpgatherqd_xmm_k1_vm64y = 3303,
	EVEX_Vpgatherqd_ymm_k1_vm64z = 3304,
	EVEX_Vpgatherqq_xmm_k1_vm64x = 3305,
	EVEX_Vpgatherqq_ymm_k1_vm64y = 3306,
	EVEX_Vpgatherqq_zmm_k1_vm64z = 3307,
	VEX_Vgatherdps_xmm_vm32x_xmm = 3308,
	VEX_Vgatherdps_ymm_vm32y_ymm = 3309,
	VEX_Vgatherdpd_xmm_vm32x_xmm = 3310,
	VEX_Vgatherdpd_ymm_vm32x_ymm = 3311,
	EVEX_Vgatherdps_xmm_k1_vm32x = 3312,
	EVEX_Vgatherdps_ymm_k1_vm32y = 3313,
	EVEX_Vgatherdps_zmm_k1_vm32z = 3314,
	EVEX_Vgatherdpd_xmm_k1_vm32x = 3315,
	EVEX_Vgatherdpd_ymm_k1_vm32x = 3316,
	EVEX_Vgatherdpd_zmm_k1_vm32y = 3317,
	VEX_Vgatherqps_xmm_vm64x_xmm = 3318,
	VEX_Vgatherqps_xmm_vm64y_xmm = 3319,
	VEX_Vgatherqpd_xmm_vm64x_xmm = 3320,
	VEX_Vgatherqpd_ymm_vm64y_ymm = 3321,
	EVEX_Vgatherqps_xmm_k1_vm64x = 3322,
	EVEX_Vgatherqps_xmm_k1_vm64y = 3323,
	EVEX_Vgatherqps_ymm_k1_vm64z = 3324,
	EVEX_Vgatherqpd_xmm_k1_vm64x = 3325,
	EVEX_Vgatherqpd_ymm_k1_vm64y = 3326,
	EVEX_Vgatherqpd_zmm_k1_vm64z = 3327,
	VEX_Vfmaddsub132ps_xmm_xmm_xmmm128 = 3328,
	VEX_Vfmaddsub132ps_ymm_ymm_ymmm256 = 3329,
	VEX_Vfmaddsub132pd_xmm_xmm_xmmm128 = 3330,
	VEX_Vfmaddsub132pd_ymm_ymm_ymmm256 = 3331,
	EVEX_Vfmaddsub132ps_xmm_k1z_xmm_xmmm128b32 = 3332,
	EVEX_Vfmaddsub132ps_ymm_k1z_ymm_ymmm256b32 = 3333,
	EVEX_Vfmaddsub132ps_zmm_k1z_zmm_zmmm512b32_er = 3334,
	EVEX_Vfmaddsub132pd_xmm_k1z_xmm_xmmm128b64 = 3335,
	EVEX_Vfmaddsub132pd_ymm_k1z_ymm_ymmm256b64 = 3336,
	EVEX_Vfmaddsub132pd_zmm_k1z_zmm_zmmm512b64_er = 3337,
	VEX_Vfmsubadd132ps_xmm_xmm_xmmm128 = 3338,
	VEX_Vfmsubadd132ps_ymm_ymm_ymmm256 = 3339,
	VEX_Vfmsubadd132pd_xmm_xmm_xmmm128 = 3340,
	VEX_Vfmsubadd132pd_ymm_ymm_ymmm256 = 3341,
	EVEX_Vfmsubadd132ps_xmm_k1z_xmm_xmmm128b32 = 3342,
	EVEX_Vfmsubadd132ps_ymm_k1z_ymm_ymmm256b32 = 3343,
	EVEX_Vfmsubadd132ps_zmm_k1z_zmm_zmmm512b32_er = 3344,
	EVEX_Vfmsubadd132pd_xmm_k1z_xmm_xmmm128b64 = 3345,
	EVEX_Vfmsubadd132pd_ymm_k1z_ymm_ymmm256b64 = 3346,
	EVEX_Vfmsubadd132pd_zmm_k1z_zmm_zmmm512b64_er = 3347,
	VEX_Vfmadd132ps_xmm_xmm_xmmm128 = 3348,
	VEX_Vfmadd132ps_ymm_ymm_ymmm256 = 3349,
	VEX_Vfmadd132pd_xmm_xmm_xmmm128 = 3350,
	VEX_Vfmadd132pd_ymm_ymm_ymmm256 = 3351,
	EVEX_Vfmadd132ps_xmm_k1z_xmm_xmmm128b32 = 3352,
	EVEX_Vfmadd132ps_ymm_k1z_ymm_ymmm256b32 = 3353,
	EVEX_Vfmadd132ps_zmm_k1z_zmm_zmmm512b32_er = 3354,
	EVEX_Vfmadd132pd_xmm_k1z_xmm_xmmm128b64 = 3355,
	EVEX_Vfmadd132pd_ymm_k1z_ymm_ymmm256b64 = 3356,
	EVEX_Vfmadd132pd_zmm_k1z_zmm_zmmm512b64_er = 3357,
	VEX_Vfmadd132ss_xmm_xmm_xmmm32 = 3358,
	VEX_Vfmadd132sd_xmm_xmm_xmmm64 = 3359,
	EVEX_Vfmadd132ss_xmm_k1z_xmm_xmmm32_er = 3360,
	EVEX_Vfmadd132sd_xmm_k1z_xmm_xmmm64_er = 3361,
	VEX_Vfmsub132ps_xmm_xmm_xmmm128 = 3362,
	VEX_Vfmsub132ps_ymm_ymm_ymmm256 = 3363,
	VEX_Vfmsub132pd_xmm_xmm_xmmm128 = 3364,
	VEX_Vfmsub132pd_ymm_ymm_ymmm256 = 3365,
	EVEX_Vfmsub132ps_xmm_k1z_xmm_xmmm128b32 = 3366,
	EVEX_Vfmsub132ps_ymm_k1z_ymm_ymmm256b32 = 3367,
	EVEX_Vfmsub132ps_zmm_k1z_zmm_zmmm512b32_er = 3368,
	EVEX_Vfmsub132pd_xmm_k1z_xmm_xmmm128b64 = 3369,
	EVEX_Vfmsub132pd_ymm_k1z_ymm_ymmm256b64 = 3370,
	EVEX_Vfmsub132pd_zmm_k1z_zmm_zmmm512b64_er = 3371,
	EVEX_V4fmaddps_zmm_k1z_zmmp3_m128 = 3372,
	VEX_Vfmsub132ss_xmm_xmm_xmmm32 = 3373,
	VEX_Vfmsub132sd_xmm_xmm_xmmm64 = 3374,
	EVEX_Vfmsub132ss_xmm_k1z_xmm_xmmm32_er = 3375,
	EVEX_Vfmsub132sd_xmm_k1z_xmm_xmmm64_er = 3376,
	EVEX_V4fmaddss_xmm_k1z_xmmp3_m128 = 3377,
	VEX_Vfnmadd132ps_xmm_xmm_xmmm128 = 3378,
	VEX_Vfnmadd132ps_ymm_ymm_ymmm256 = 3379,
	VEX_Vfnmadd132pd_xmm_xmm_xmmm128 = 3380,
	VEX_Vfnmadd132pd_ymm_ymm_ymmm256 = 3381,
	EVEX_Vfnmadd132ps_xmm_k1z_xmm_xmmm128b32 = 3382,
	EVEX_Vfnmadd132ps_ymm_k1z_ymm_ymmm256b32 = 3383,
	EVEX_Vfnmadd132ps_zmm_k1z_zmm_zmmm512b32_er = 3384,
	EVEX_Vfnmadd132pd_xmm_k1z_xmm_xmmm128b64 = 3385,
	EVEX_Vfnmadd132pd_ymm_k1z_ymm_ymmm256b64 = 3386,
	EVEX_Vfnmadd132pd_zmm_k1z_zmm_zmmm512b64_er = 3387,
	VEX_Vfnmadd132ss_xmm_xmm_xmmm32 = 3388,
	VEX_Vfnmadd132sd_xmm_xmm_xmmm64 = 3389,
	EVEX_Vfnmadd132ss_xmm_k1z_xmm_xmmm32_er = 3390,
	EVEX_Vfnmadd132sd_xmm_k1z_xmm_xmmm64_er = 3391,
	VEX_Vfnmsub132ps_xmm_xmm_xmmm128 = 3392,
	VEX_Vfnmsub132ps_ymm_ymm_ymmm256 = 3393,
	VEX_Vfnmsub132pd_xmm_xmm_xmmm128 = 3394,
	VEX_Vfnmsub132pd_ymm_ymm_ymmm256 = 3395,
	EVEX_Vfnmsub132ps_xmm_k1z_xmm_xmmm128b32 = 3396,
	EVEX_Vfnmsub132ps_ymm_k1z_ymm_ymmm256b32 = 3397,
	EVEX_Vfnmsub132ps_zmm_k1z_zmm_zmmm512b32_er = 3398,
	EVEX_Vfnmsub132pd_xmm_k1z_xmm_xmmm128b64 = 3399,
	EVEX_Vfnmsub132pd_ymm_k1z_ymm_ymmm256b64 = 3400,
	EVEX_Vfnmsub132pd_zmm_k1z_zmm_zmmm512b64_er = 3401,
	VEX_Vfnmsub132ss_xmm_xmm_xmmm32 = 3402,
	VEX_Vfnmsub132sd_xmm_xmm_xmmm64 = 3403,
	EVEX_Vfnmsub132ss_xmm_k1z_xmm_xmmm32_er = 3404,
	EVEX_Vfnmsub132sd_xmm_k1z_xmm_xmmm64_er = 3405,
	EVEX_Vpscatterdd_vm32x_k1_xmm = 3406,
	EVEX_Vpscatterdd_vm32y_k1_ymm = 3407,
	EVEX_Vpscatterdd_vm32z_k1_zmm = 3408,
	EVEX_Vpscatterdq_vm32x_k1_xmm = 3409,
	EVEX_Vpscatterdq_vm32x_k1_ymm = 3410,
	EVEX_Vpscatterdq_vm32y_k1_zmm = 3411,
	EVEX_Vpscatterqd_vm64x_k1_xmm = 3412,
	EVEX_Vpscatterqd_vm64y_k1_xmm = 3413,
	EVEX_Vpscatterqd_vm64z_k1_ymm = 3414,
	EVEX_Vpscatterqq_vm64x_k1_xmm = 3415,
	EVEX_Vpscatterqq_vm64y_k1_ymm = 3416,
	EVEX_Vpscatterqq_vm64z_k1_zmm = 3417,
	EVEX_Vscatterdps_vm32x_k1_xmm = 3418,
	EVEX_Vscatterdps_vm32y_k1_ymm = 3419,
	EVEX_Vscatterdps_vm32z_k1_zmm = 3420,
	EVEX_Vscatterdpd_vm32x_k1_xmm = 3421,
	EVEX_Vscatterdpd_vm32x_k1_ymm = 3422,
	EVEX_Vscatterdpd_vm32y_k1_zmm = 3423,
	EVEX_Vscatterqps_vm64x_k1_xmm = 3424,
	EVEX_Vscatterqps_vm64y_k1_xmm = 3425,
	EVEX_Vscatterqps_vm64z_k1_ymm = 3426,
	EVEX_Vscatterqpd_vm64x_k1_xmm = 3427,
	EVEX_Vscatterqpd_vm64y_k1_ymm = 3428,
	EVEX_Vscatterqpd_vm64z_k1_zmm = 3429,
	VEX_Vfmaddsub213ps_xmm_xmm_xmmm128 = 3430,
	VEX_Vfmaddsub213ps_ymm_ymm_ymmm256 = 3431,
	VEX_Vfmaddsub213pd_xmm_xmm_xmmm128 = 3432,
	VEX_Vfmaddsub213pd_ymm_ymm_ymmm256 = 3433,
	EVEX_Vfmaddsub213ps_xmm_k1z_xmm_xmmm128b32 = 3434,
	EVEX_Vfmaddsub213ps_ymm_k1z_ymm_ymmm256b32 = 3435,
	EVEX_Vfmaddsub213ps_zmm_k1z_zmm_zmmm512b32_er = 3436,
	EVEX_Vfmaddsub213pd_xmm_k1z_xmm_xmmm128b64 = 3437,
	EVEX_Vfmaddsub213pd_ymm_k1z_ymm_ymmm256b64 = 3438,
	EVEX_Vfmaddsub213pd_zmm_k1z_zmm_zmmm512b64_er = 3439,
	VEX_Vfmsubadd213ps_xmm_xmm_xmmm128 = 3440,
	VEX_Vfmsubadd213ps_ymm_ymm_ymmm256 = 3441,
	VEX_Vfmsubadd213pd_xmm_xmm_xmmm128 = 3442,
	VEX_Vfmsubadd213pd_ymm_ymm_ymmm256 = 3443,
	EVEX_Vfmsubadd213ps_xmm_k1z_xmm_xmmm128b32 = 3444,
	EVEX_Vfmsubadd213ps_ymm_k1z_ymm_ymmm256b32 = 3445,
	EVEX_Vfmsubadd213ps_zmm_k1z_zmm_zmmm512b32_er = 3446,
	EVEX_Vfmsubadd213pd_xmm_k1z_xmm_xmmm128b64 = 3447,
	EVEX_Vfmsubadd213pd_ymm_k1z_ymm_ymmm256b64 = 3448,
	EVEX_Vfmsubadd213pd_zmm_k1z_zmm_zmmm512b64_er = 3449,
	VEX_Vfmadd213ps_xmm_xmm_xmmm128 = 3450,
	VEX_Vfmadd213ps_ymm_ymm_ymmm256 = 3451,
	VEX_Vfmadd213pd_xmm_xmm_xmmm128 = 3452,
	VEX_Vfmadd213pd_ymm_ymm_ymmm256 = 3453,
	EVEX_Vfmadd213ps_xmm_k1z_xmm_xmmm128b32 = 3454,
	EVEX_Vfmadd213ps_ymm_k1z_ymm_ymmm256b32 = 3455,
	EVEX_Vfmadd213ps_zmm_k1z_zmm_zmmm512b32_er = 3456,
	EVEX_Vfmadd213pd_xmm_k1z_xmm_xmmm128b64 = 3457,
	EVEX_Vfmadd213pd_ymm_k1z_ymm_ymmm256b64 = 3458,
	EVEX_Vfmadd213pd_zmm_k1z_zmm_zmmm512b64_er = 3459,
	VEX_Vfmadd213ss_xmm_xmm_xmmm32 = 3460,
	VEX_Vfmadd213sd_xmm_xmm_xmmm64 = 3461,
	EVEX_Vfmadd213ss_xmm_k1z_xmm_xmmm32_er = 3462,
	EVEX_Vfmadd213sd_xmm_k1z_xmm_xmmm64_er = 3463,
	VEX_Vfmsub213ps_xmm_xmm_xmmm128 = 3464,
	VEX_Vfmsub213ps_ymm_ymm_ymmm256 = 3465,
	VEX_Vfmsub213pd_xmm_xmm_xmmm128 = 3466,
	VEX_Vfmsub213pd_ymm_ymm_ymmm256 = 3467,
	EVEX_Vfmsub213ps_xmm_k1z_xmm_xmmm128b32 = 3468,
	EVEX_Vfmsub213ps_ymm_k1z_ymm_ymmm256b32 = 3469,
	EVEX_Vfmsub213ps_zmm_k1z_zmm_zmmm512b32_er = 3470,
	EVEX_Vfmsub213pd_xmm_k1z_xmm_xmmm128b64 = 3471,
	EVEX_Vfmsub213pd_ymm_k1z_ymm_ymmm256b64 = 3472,
	EVEX_Vfmsub213pd_zmm_k1z_zmm_zmmm512b64_er = 3473,
	EVEX_V4fnmaddps_zmm_k1z_zmmp3_m128 = 3474,
	VEX_Vfmsub213ss_xmm_xmm_xmmm32 = 3475,
	VEX_Vfmsub213sd_xmm_xmm_xmmm64 = 3476,
	EVEX_Vfmsub213ss_xmm_k1z_xmm_xmmm32_er = 3477,
	EVEX_Vfmsub213sd_xmm_k1z_xmm_xmmm64_er = 3478,
	EVEX_V4fnmaddss_xmm_k1z_xmmp3_m128 = 3479,
	VEX_Vfnmadd213ps_xmm_xmm_xmmm128 = 3480,
	VEX_Vfnmadd213ps_ymm_ymm_ymmm256 = 3481,
	VEX_Vfnmadd213pd_xmm_xmm_xmmm128 = 3482,
	VEX_Vfnmadd213pd_ymm_ymm_ymmm256 = 3483,
	EVEX_Vfnmadd213ps_xmm_k1z_xmm_xmmm128b32 = 3484,
	EVEX_Vfnmadd213ps_ymm_k1z_ymm_ymmm256b32 = 3485,
	EVEX_Vfnmadd213ps_zmm_k1z_zmm_zmmm512b32_er = 3486,
	EVEX_Vfnmadd213pd_xmm_k1z_xmm_xmmm128b64 = 3487,
	EVEX_Vfnmadd213pd_ymm_k1z_ymm_ymmm256b64 = 3488,
	EVEX_Vfnmadd213pd_zmm_k1z_zmm_zmmm512b64_er = 3489,
	VEX_Vfnmadd213ss_xmm_xmm_xmmm32 = 3490,
	VEX_Vfnmadd213sd_xmm_xmm_xmmm64 = 3491,
	EVEX_Vfnmadd213ss_xmm_k1z_xmm_xmmm32_er = 3492,
	EVEX_Vfnmadd213sd_xmm_k1z_xmm_xmmm64_er = 3493,
	VEX_Vfnmsub213ps_xmm_xmm_xmmm128 = 3494,
	VEX_Vfnmsub213ps_ymm_ymm_ymmm256 = 3495,
	VEX_Vfnmsub213pd_xmm_xmm_xmmm128 = 3496,
	VEX_Vfnmsub213pd_ymm_ymm_ymmm256 = 3497,
	EVEX_Vfnmsub213ps_xmm_k1z_xmm_xmmm128b32 = 3498,
	EVEX_Vfnmsub213ps_ymm_k1z_ymm_ymmm256b32 = 3499,
	EVEX_Vfnmsub213ps_zmm_k1z_zmm_zmmm512b32_er = 3500,
	EVEX_Vfnmsub213pd_xmm_k1z_xmm_xmmm128b64 = 3501,
	EVEX_Vfnmsub213pd_ymm_k1z_ymm_ymmm256b64 = 3502,
	EVEX_Vfnmsub213pd_zmm_k1z_zmm_zmmm512b64_er = 3503,
	VEX_Vfnmsub213ss_xmm_xmm_xmmm32 = 3504,
	VEX_Vfnmsub213sd_xmm_xmm_xmmm64 = 3505,
	EVEX_Vfnmsub213ss_xmm_k1z_xmm_xmmm32_er = 3506,
	EVEX_Vfnmsub213sd_xmm_k1z_xmm_xmmm64_er = 3507,
	EVEX_Vpmadd52luq_xmm_k1z_xmm_xmmm128b64 = 3508,
	EVEX_Vpmadd52luq_ymm_k1z_ymm_ymmm256b64 = 3509,
	EVEX_Vpmadd52luq_zmm_k1z_zmm_zmmm512b64 = 3510,
	EVEX_Vpmadd52huq_xmm_k1z_xmm_xmmm128b64 = 3511,
	EVEX_Vpmadd52huq_ymm_k1z_ymm_ymmm256b64 = 3512,
	EVEX_Vpmadd52huq_zmm_k1z_zmm_zmmm512b64 = 3513,
	VEX_Vfmaddsub231ps_xmm_xmm_xmmm128 = 3514,
	VEX_Vfmaddsub231ps_ymm_ymm_ymmm256 = 3515,
	VEX_Vfmaddsub231pd_xmm_xmm_xmmm128 = 3516,
	VEX_Vfmaddsub231pd_ymm_ymm_ymmm256 = 3517,
	EVEX_Vfmaddsub231ps_xmm_k1z_xmm_xmmm128b32 = 3518,
	EVEX_Vfmaddsub231ps_ymm_k1z_ymm_ymmm256b32 = 3519,
	EVEX_Vfmaddsub231ps_zmm_k1z_zmm_zmmm512b32_er = 3520,
	EVEX_Vfmaddsub231pd_xmm_k1z_xmm_xmmm128b64 = 3521,
	EVEX_Vfmaddsub231pd_ymm_k1z_ymm_ymmm256b64 = 3522,
	EVEX_Vfmaddsub231pd_zmm_k1z_zmm_zmmm512b64_er = 3523,
	VEX_Vfmsubadd231ps_xmm_xmm_xmmm128 = 3524,
	VEX_Vfmsubadd231ps_ymm_ymm_ymmm256 = 3525,
	VEX_Vfmsubadd231pd_xmm_xmm_xmmm128 = 3526,
	VEX_Vfmsubadd231pd_ymm_ymm_ymmm256 = 3527,
	EVEX_Vfmsubadd231ps_xmm_k1z_xmm_xmmm128b32 = 3528,
	EVEX_Vfmsubadd231ps_ymm_k1z_ymm_ymmm256b32 = 3529,
	EVEX_Vfmsubadd231ps_zmm_k1z_zmm_zmmm512b32_er = 3530,
	EVEX_Vfmsubadd231pd_xmm_k1z_xmm_xmmm128b64 = 3531,
	EVEX_Vfmsubadd231pd_ymm_k1z_ymm_ymmm256b64 = 3532,
	EVEX_Vfmsubadd231pd_zmm_k1z_zmm_zmmm512b64_er = 3533,
	VEX_Vfmadd231ps_xmm_xmm_xmmm128 = 3534,
	VEX_Vfmadd231ps_ymm_ymm_ymmm256 = 3535,
	VEX_Vfmadd231pd_xmm_xmm_xmmm128 = 3536,
	VEX_Vfmadd231pd_ymm_ymm_ymmm256 = 3537,
	EVEX_Vfmadd231ps_xmm_k1z_xmm_xmmm128b32 = 3538,
	EVEX_Vfmadd231ps_ymm_k1z_ymm_ymmm256b32 = 3539,
	EVEX_Vfmadd231ps_zmm_k1z_zmm_zmmm512b32_er = 3540,
	EVEX_Vfmadd231pd_xmm_k1z_xmm_xmmm128b64 = 3541,
	EVEX_Vfmadd231pd_ymm_k1z_ymm_ymmm256b64 = 3542,
	EVEX_Vfmadd231pd_zmm_k1z_zmm_zmmm512b64_er = 3543,
	VEX_Vfmadd231ss_xmm_xmm_xmmm32 = 3544,
	VEX_Vfmadd231sd_xmm_xmm_xmmm64 = 3545,
	EVEX_Vfmadd231ss_xmm_k1z_xmm_xmmm32_er = 3546,
	EVEX_Vfmadd231sd_xmm_k1z_xmm_xmmm64_er = 3547,
	VEX_Vfmsub231ps_xmm_xmm_xmmm128 = 3548,
	VEX_Vfmsub231ps_ymm_ymm_ymmm256 = 3549,
	VEX_Vfmsub231pd_xmm_xmm_xmmm128 = 3550,
	VEX_Vfmsub231pd_ymm_ymm_ymmm256 = 3551,
	EVEX_Vfmsub231ps_xmm_k1z_xmm_xmmm128b32 = 3552,
	EVEX_Vfmsub231ps_ymm_k1z_ymm_ymmm256b32 = 3553,
	EVEX_Vfmsub231ps_zmm_k1z_zmm_zmmm512b32_er = 3554,
	EVEX_Vfmsub231pd_xmm_k1z_xmm_xmmm128b64 = 3555,
	EVEX_Vfmsub231pd_ymm_k1z_ymm_ymmm256b64 = 3556,
	EVEX_Vfmsub231pd_zmm_k1z_zmm_zmmm512b64_er = 3557,
	VEX_Vfmsub231ss_xmm_xmm_xmmm32 = 3558,
	VEX_Vfmsub231sd_xmm_xmm_xmmm64 = 3559,
	EVEX_Vfmsub231ss_xmm_k1z_xmm_xmmm32_er = 3560,
	EVEX_Vfmsub231sd_xmm_k1z_xmm_xmmm64_er = 3561,
	VEX_Vfnmadd231ps_xmm_xmm_xmmm128 = 3562,
	VEX_Vfnmadd231ps_ymm_ymm_ymmm256 = 3563,
	VEX_Vfnmadd231pd_xmm_xmm_xmmm128 = 3564,
	VEX_Vfnmadd231pd_ymm_ymm_ymmm256 = 3565,
	EVEX_Vfnmadd231ps_xmm_k1z_xmm_xmmm128b32 = 3566,
	EVEX_Vfnmadd231ps_ymm_k1z_ymm_ymmm256b32 = 3567,
	EVEX_Vfnmadd231ps_zmm_k1z_zmm_zmmm512b32_er = 3568,
	EVEX_Vfnmadd231pd_xmm_k1z_xmm_xmmm128b64 = 3569,
	EVEX_Vfnmadd231pd_ymm_k1z_ymm_ymmm256b64 = 3570,
	EVEX_Vfnmadd231pd_zmm_k1z_zmm_zmmm512b64_er = 3571,
	VEX_Vfnmadd231ss_xmm_xmm_xmmm32 = 3572,
	VEX_Vfnmadd231sd_xmm_xmm_xmmm64 = 3573,
	EVEX_Vfnmadd231ss_xmm_k1z_xmm_xmmm32_er = 3574,
	EVEX_Vfnmadd231sd_xmm_k1z_xmm_xmmm64_er = 3575,
	VEX_Vfnmsub231ps_xmm_xmm_xmmm128 = 3576,
	VEX_Vfnmsub231ps_ymm_ymm_ymmm256 = 3577,
	VEX_Vfnmsub231pd_xmm_xmm_xmmm128 = 3578,
	VEX_Vfnmsub231pd_ymm_ymm_ymmm256 = 3579,
	EVEX_Vfnmsub231ps_xmm_k1z_xmm_xmmm128b32 = 3580,
	EVEX_Vfnmsub231ps_ymm_k1z_ymm_ymmm256b32 = 3581,
	EVEX_Vfnmsub231ps_zmm_k1z_zmm_zmmm512b32_er = 3582,
	EVEX_Vfnmsub231pd_xmm_k1z_xmm_xmmm128b64 = 3583,
	EVEX_Vfnmsub231pd_ymm_k1z_ymm_ymmm256b64 = 3584,
	EVEX_Vfnmsub231pd_zmm_k1z_zmm_zmmm512b64_er = 3585,
	VEX_Vfnmsub231ss_xmm_xmm_xmmm32 = 3586,
	VEX_Vfnmsub231sd_xmm_xmm_xmmm64 = 3587,
	EVEX_Vfnmsub231ss_xmm_k1z_xmm_xmmm32_er = 3588,
	EVEX_Vfnmsub231sd_xmm_k1z_xmm_xmmm64_er = 3589,
	EVEX_Vpconflictd_xmm_k1z_xmmm128b32 = 3590,
	EVEX_Vpconflictd_ymm_k1z_ymmm256b32 = 3591,
	EVEX_Vpconflictd_zmm_k1z_zmmm512b32 = 3592,
	EVEX_Vpconflictq_xmm_k1z_xmmm128b64 = 3593,
	EVEX_Vpconflictq_ymm_k1z_ymmm256b64 = 3594,
	EVEX_Vpconflictq_zmm_k1z_zmmm512b64 = 3595,
	EVEX_Vgatherpf0dps_vm32z_k1 = 3596,
	EVEX_Vgatherpf0dpd_vm32y_k1 = 3597,
	EVEX_Vgatherpf1dps_vm32z_k1 = 3598,
	EVEX_Vgatherpf1dpd_vm32y_k1 = 3599,
	EVEX_Vscatterpf0dps_vm32z_k1 = 3600,
	EVEX_Vscatterpf0dpd_vm32y_k1 = 3601,
	EVEX_Vscatterpf1dps_vm32z_k1 = 3602,
	EVEX_Vscatterpf1dpd_vm32y_k1 = 3603,
	EVEX_Vgatherpf0qps_vm64z_k1 = 3604,
	EVEX_Vgatherpf0qpd_vm64z_k1 = 3605,
	EVEX_Vgatherpf1qps_vm64z_k1 = 3606,
	EVEX_Vgatherpf1qpd_vm64z_k1 = 3607,
	EVEX_Vscatterpf0qps_vm64z_k1 = 3608,
	EVEX_Vscatterpf0qpd_vm64z_k1 = 3609,
	EVEX_Vscatterpf1qps_vm64z_k1 = 3610,
	EVEX_Vscatterpf1qpd_vm64z_k1 = 3611,
	Sha1nexte_xmm_xmmm128 = 3612,
	EVEX_Vexp2ps_zmm_k1z_zmmm512b32_sae = 3613,
	EVEX_Vexp2pd_zmm_k1z_zmmm512b64_sae = 3614,
	Sha1msg1_xmm_xmmm128 = 3615,
	Sha1msg2_xmm_xmmm128 = 3616,
	EVEX_Vrcp28ps_zmm_k1z_zmmm512b32_sae = 3617,
	EVEX_Vrcp28pd_zmm_k1z_zmmm512b64_sae = 3618,
	Sha256rnds2_xmm_xmmm128 = 3619,
	EVEX_Vrcp28ss_xmm_k1z_xmm_xmmm32_sae = 3620,
	EVEX_Vrcp28sd_xmm_k1z_xmm_xmmm64_sae = 3621,
	Sha256msg1_xmm_xmmm128 = 3622,
	EVEX_Vrsqrt28ps_zmm_k1z_zmmm512b32_sae = 3623,
	EVEX_Vrsqrt28pd_zmm_k1z_zmmm512b64_sae = 3624,
	Sha256msg2_xmm_xmmm128 = 3625,
	EVEX_Vrsqrt28ss_xmm_k1z_xmm_xmmm32_sae = 3626,
	EVEX_Vrsqrt28sd_xmm_k1z_xmm_xmmm64_sae = 3627,
	Gf2p8mulb_xmm_xmmm128 = 3628,
	VEX_Vgf2p8mulb_xmm_xmm_xmmm128 = 3629,
	VEX_Vgf2p8mulb_ymm_ymm_ymmm256 = 3630,
	EVEX_Vgf2p8mulb_xmm_k1z_xmm_xmmm128 = 3631,
	EVEX_Vgf2p8mulb_ymm_k1z_ymm_ymmm256 = 3632,
	EVEX_Vgf2p8mulb_zmm_k1z_zmm_zmmm512 = 3633,
	Aesimc_xmm_xmmm128 = 3634,
	VEX_Vaesimc_xmm_xmmm128 = 3635,
	Aesenc_xmm_xmmm128 = 3636,
	VEX_Vaesenc_xmm_xmm_xmmm128 = 3637,
	VEX_Vaesenc_ymm_ymm_ymmm256 = 3638,
	EVEX_Vaesenc_xmm_xmm_xmmm128 = 3639,
	EVEX_Vaesenc_ymm_ymm_ymmm256 = 3640,
	EVEX_Vaesenc_zmm_zmm_zmmm512 = 3641,
	Aesenclast_xmm_xmmm128 = 3642,
	VEX_Vaesenclast_xmm_xmm_xmmm128 = 3643,
	VEX_Vaesenclast_ymm_ymm_ymmm256 = 3644,
	EVEX_Vaesenclast_xmm_xmm_xmmm128 = 3645,
	EVEX_Vaesenclast_ymm_ymm_ymmm256 = 3646,
	EVEX_Vaesenclast_zmm_zmm_zmmm512 = 3647,
	Aesdec_xmm_xmmm128 = 3648,
	VEX_Vaesdec_xmm_xmm_xmmm128 = 3649,
	VEX_Vaesdec_ymm_ymm_ymmm256 = 3650,
	EVEX_Vaesdec_xmm_xmm_xmmm128 = 3651,
	EVEX_Vaesdec_ymm_ymm_ymmm256 = 3652,
	EVEX_Vaesdec_zmm_zmm_zmmm512 = 3653,
	Aesdeclast_xmm_xmmm128 = 3654,
	VEX_Vaesdeclast_xmm_xmm_xmmm128 = 3655,
	VEX_Vaesdeclast_ymm_ymm_ymmm256 = 3656,
	EVEX_Vaesdeclast_xmm_xmm_xmmm128 = 3657,
	EVEX_Vaesdeclast_ymm_ymm_ymmm256 = 3658,
	EVEX_Vaesdeclast_zmm_zmm_zmmm512 = 3659,
	Movbe_r16_m16 = 3660,
	Movbe_r32_m32 = 3661,
	Movbe_r64_m64 = 3662,
	Crc32_r32_rm8 = 3663,
	Crc32_r64_rm8 = 3664,
	Movbe_m16_r16 = 3665,
	Movbe_m32_r32 = 3666,
	Movbe_m64_r64 = 3667,
	Crc32_r32_rm16 = 3668,
	Crc32_r32_rm32 = 3669,
	Crc32_r64_rm64 = 3670,
	VEX_Andn_r32_r32_rm32 = 3671,
	VEX_Andn_r64_r64_rm64 = 3672,
	VEX_Blsr_r32_rm32 = 3673,
	VEX_Blsr_r64_rm64 = 3674,
	VEX_Blsmsk_r32_rm32 = 3675,
	VEX_Blsmsk_r64_rm64 = 3676,
	VEX_Blsi_r32_rm32 = 3677,
	VEX_Blsi_r64_rm64 = 3678,
	VEX_Bzhi_r32_rm32_r32 = 3679,
	VEX_Bzhi_r64_rm64_r64 = 3680,
	Wrussd_m32_r32 = 3681,
	Wrussq_m64_r64 = 3682,
	VEX_Pext_r32_r32_rm32 = 3683,
	VEX_Pext_r64_r64_rm64 = 3684,
	VEX_Pdep_r32_r32_rm32 = 3685,
	VEX_Pdep_r64_r64_rm64 = 3686,
	Wrssd_m32_r32 = 3687,
	Wrssq_m64_r64 = 3688,
	Adcx_r32_rm32 = 3689,
	Adcx_r64_rm64 = 3690,
	Adox_r32_rm32 = 3691,
	Adox_r64_rm64 = 3692,
	VEX_Mulx_r32_r32_rm32 = 3693,
	VEX_Mulx_r64_r64_rm64 = 3694,
	VEX_Bextr_r32_rm32_r32 = 3695,
	VEX_Bextr_r64_rm64_r64 = 3696,
	VEX_Shlx_r32_rm32_r32 = 3697,
	VEX_Shlx_r64_rm64_r64 = 3698,
	VEX_Sarx_r32_rm32_r32 = 3699,
	VEX_Sarx_r64_rm64_r64 = 3700,
	VEX_Shrx_r32_rm32_r32 = 3701,
	VEX_Shrx_r64_rm64_r64 = 3702,
	Movdir64b_r16_m512 = 3703,
	Movdir64b_r32_m512 = 3704,
	Movdir64b_r64_m512 = 3705,
	Enqcmds_r16_m512 = 3706,
	Enqcmds_r32_m512 = 3707,
	Enqcmds_r64_m512 = 3708,
	Enqcmd_r16_m512 = 3709,
	Enqcmd_r32_m512 = 3710,
	Enqcmd_r64_m512 = 3711,
	Movdiri_m32_r32 = 3712,
	Movdiri_m64_r64 = 3713,
	VEX_Vpermq_ymm_ymmm256_imm8 = 3714,
	EVEX_Vpermq_ymm_k1z_ymmm256b64_imm8 = 3715,
	EVEX_Vpermq_zmm_k1z_zmmm512b64_imm8 = 3716,
	VEX_Vpermpd_ymm_ymmm256_imm8 = 3717,
	EVEX_Vpermpd_ymm_k1z_ymmm256b64_imm8 = 3718,
	EVEX_Vpermpd_zmm_k1z_zmmm512b64_imm8 = 3719,
	VEX_Vpblendd_xmm_xmm_xmmm128_imm8 = 3720,
	VEX_Vpblendd_ymm_ymm_ymmm256_imm8 = 3721,
	EVEX_Valignd_xmm_k1z_xmm_xmmm128b32_imm8 = 3722,
	EVEX_Valignd_ymm_k1z_ymm_ymmm256b32_imm8 = 3723,
	EVEX_Valignd_zmm_k1z_zmm_zmmm512b32_imm8 = 3724,
	EVEX_Valignq_xmm_k1z_xmm_xmmm128b64_imm8 = 3725,
	EVEX_Valignq_ymm_k1z_ymm_ymmm256b64_imm8 = 3726,
	EVEX_Valignq_zmm_k1z_zmm_zmmm512b64_imm8 = 3727,
	VEX_Vpermilps_xmm_xmmm128_imm8 = 3728,
	VEX_Vpermilps_ymm_ymmm256_imm8 = 3729,
	EVEX_Vpermilps_xmm_k1z_xmmm128b32_imm8 = 3730,
	EVEX_Vpermilps_ymm_k1z_ymmm256b32_imm8 = 3731,
	EVEX_Vpermilps_zmm_k1z_zmmm512b32_imm8 = 3732,
	VEX_Vpermilpd_xmm_xmmm128_imm8 = 3733,
	VEX_Vpermilpd_ymm_ymmm256_imm8 = 3734,
	EVEX_Vpermilpd_xmm_k1z_xmmm128b64_imm8 = 3735,
	EVEX_Vpermilpd_ymm_k1z_ymmm256b64_imm8 = 3736,
	EVEX_Vpermilpd_zmm_k1z_zmmm512b64_imm8 = 3737,
	VEX_Vperm2f128_ymm_ymm_ymmm256_imm8 = 3738,
	Roundps_xmm_xmmm128_imm8 = 3739,
	VEX_Vroundps_xmm_xmmm128_imm8 = 3740,
	VEX_Vroundps_ymm_ymmm256_imm8 = 3741,
	EVEX_Vrndscaleps_xmm_k1z_xmmm128b32_imm8 = 3742,
	EVEX_Vrndscaleps_ymm_k1z_ymmm256b32_imm8 = 3743,
	EVEX_Vrndscaleps_zmm_k1z_zmmm512b32_imm8_sae = 3744,
	Roundpd_xmm_xmmm128_imm8 = 3745,
	VEX_Vroundpd_xmm_xmmm128_imm8 = 3746,
	VEX_Vroundpd_ymm_ymmm256_imm8 = 3747,
	EVEX_Vrndscalepd_xmm_k1z_xmmm128b64_imm8 = 3748,
	EVEX_Vrndscalepd_ymm_k1z_ymmm256b64_imm8 = 3749,
	EVEX_Vrndscalepd_zmm_k1z_zmmm512b64_imm8_sae = 3750,
	Roundss_xmm_xmmm32_imm8 = 3751,
	VEX_Vroundss_xmm_xmm_xmmm32_imm8 = 3752,
	EVEX_Vrndscaless_xmm_k1z_xmm_xmmm32_imm8_sae = 3753,
	Roundsd_xmm_xmmm64_imm8 = 3754,
	VEX_Vroundsd_xmm_xmm_xmmm64_imm8 = 3755,
	EVEX_Vrndscalesd_xmm_k1z_xmm_xmmm64_imm8_sae = 3756,
	Blendps_xmm_xmmm128_imm8 = 3757,
	VEX_Vblendps_xmm_xmm_xmmm128_imm8 = 3758,
	VEX_Vblendps_ymm_ymm_ymmm256_imm8 = 3759,
	Blendpd_xmm_xmmm128_imm8 = 3760,
	VEX_Vblendpd_xmm_xmm_xmmm128_imm8 = 3761,
	VEX_Vblendpd_ymm_ymm_ymmm256_imm8 = 3762,
	Pblendw_xmm_xmmm128_imm8 = 3763,
	VEX_Vpblendw_xmm_xmm_xmmm128_imm8 = 3764,
	VEX_Vpblendw_ymm_ymm_ymmm256_imm8 = 3765,
	Palignr_mm_mmm64_imm8 = 3766,
	Palignr_xmm_xmmm128_imm8 = 3767,
	VEX_Vpalignr_xmm_xmm_xmmm128_imm8 = 3768,
	VEX_Vpalignr_ymm_ymm_ymmm256_imm8 = 3769,
	EVEX_Vpalignr_xmm_k1z_xmm_xmmm128_imm8 = 3770,
	EVEX_Vpalignr_ymm_k1z_ymm_ymmm256_imm8 = 3771,
	EVEX_Vpalignr_zmm_k1z_zmm_zmmm512_imm8 = 3772,
	Pextrb_r32m8_xmm_imm8 = 3773,
	Pextrb_r64m8_xmm_imm8 = 3774,
	VEX_Vpextrb_r32m8_xmm_imm8 = 3775,
	VEX_Vpextrb_r64m8_xmm_imm8 = 3776,
	EVEX_Vpextrb_r32m8_xmm_imm8 = 3777,
	EVEX_Vpextrb_r64m8_xmm_imm8 = 3778,
	Pextrw_r32m16_xmm_imm8 = 3779,
	Pextrw_r64m16_xmm_imm8 = 3780,
	VEX_Vpextrw_r32m16_xmm_imm8 = 3781,
	VEX_Vpextrw_r64m16_xmm_imm8 = 3782,
	EVEX_Vpextrw_r32m16_xmm_imm8 = 3783,
	EVEX_Vpextrw_r64m16_xmm_imm8 = 3784,
	Pextrd_rm32_xmm_imm8 = 3785,
	Pextrq_rm64_xmm_imm8 = 3786,
	VEX_Vpextrd_rm32_xmm_imm8 = 3787,
	VEX_Vpextrq_rm64_xmm_imm8 = 3788,
	EVEX_Vpextrd_rm32_xmm_imm8 = 3789,
	EVEX_Vpextrq_rm64_xmm_imm8 = 3790,
	Extractps_rm32_xmm_imm8 = 3791,
	Extractps_r64m32_xmm_imm8 = 3792,
	VEX_Vextractps_rm32_xmm_imm8 = 3793,
	VEX_Vextractps_r64m32_xmm_imm8 = 3794,
	EVEX_Vextractps_rm32_xmm_imm8 = 3795,
	EVEX_Vextractps_r64m32_xmm_imm8 = 3796,
	VEX_Vinsertf128_ymm_ymm_xmmm128_imm8 = 3797,
	EVEX_Vinsertf32x4_ymm_k1z_ymm_xmmm128_imm8 = 3798,
	EVEX_Vinsertf32x4_zmm_k1z_zmm_xmmm128_imm8 = 3799,
	EVEX_Vinsertf64x2_ymm_k1z_ymm_xmmm128_imm8 = 3800,
	EVEX_Vinsertf64x2_zmm_k1z_zmm_xmmm128_imm8 = 3801,
	VEX_Vextractf128_xmmm128_ymm_imm8 = 3802,
	EVEX_Vextractf32x4_xmmm128_k1z_ymm_imm8 = 3803,
	EVEX_Vextractf32x4_xmmm128_k1z_zmm_imm8 = 3804,
	EVEX_Vextractf64x2_xmmm128_k1z_ymm_imm8 = 3805,
	EVEX_Vextractf64x2_xmmm128_k1z_zmm_imm8 = 3806,
	EVEX_Vinsertf32x8_zmm_k1z_zmm_ymmm256_imm8 = 3807,
	EVEX_Vinsertf64x4_zmm_k1z_zmm_ymmm256_imm8 = 3808,
	EVEX_Vextractf32x8_ymmm256_k1z_zmm_imm8 = 3809,
	EVEX_Vextractf64x4_ymmm256_k1z_zmm_imm8 = 3810,
	VEX_Vcvtps2ph_xmmm64_xmm_imm8 = 3811,
	VEX_Vcvtps2ph_xmmm128_ymm_imm8 = 3812,
	EVEX_Vcvtps2ph_xmmm64_k1z_xmm_imm8 = 3813,
	EVEX_Vcvtps2ph_xmmm128_k1z_ymm_imm8 = 3814,
	EVEX_Vcvtps2ph_ymmm256_k1z_zmm_imm8_sae = 3815,
	EVEX_Vpcmpud_k_k1_xmm_xmmm128b32_imm8 = 3816,
	EVEX_Vpcmpud_k_k1_ymm_ymmm256b32_imm8 = 3817,
	EVEX_Vpcmpud_k_k1_zmm_zmmm512b32_imm8 = 3818,
	EVEX_Vpcmpuq_k_k1_xmm_xmmm128b64_imm8 = 3819,
	EVEX_Vpcmpuq_k_k1_ymm_ymmm256b64_imm8 = 3820,
	EVEX_Vpcmpuq_k_k1_zmm_zmmm512b64_imm8 = 3821,
	EVEX_Vpcmpd_k_k1_xmm_xmmm128b32_imm8 = 3822,
	EVEX_Vpcmpd_k_k1_ymm_ymmm256b32_imm8 = 3823,
	EVEX_Vpcmpd_k_k1_zmm_zmmm512b32_imm8 = 3824,
	EVEX_Vpcmpq_k_k1_xmm_xmmm128b64_imm8 = 3825,
	EVEX_Vpcmpq_k_k1_ymm_ymmm256b64_imm8 = 3826,
	EVEX_Vpcmpq_k_k1_zmm_zmmm512b64_imm8 = 3827,
	Pinsrb_xmm_r32m8_imm8 = 3828,
	Pinsrb_xmm_r64m8_imm8 = 3829,
	VEX_Vpinsrb_xmm_xmm_r32m8_imm8 = 3830,
	VEX_Vpinsrb_xmm_xmm_r64m8_imm8 = 3831,
	EVEX_Vpinsrb_xmm_xmm_r32m8_imm8 = 3832,
	EVEX_Vpinsrb_xmm_xmm_r64m8_imm8 = 3833,
	Insertps_xmm_xmmm32_imm8 = 3834,
	VEX_Vinsertps_xmm_xmm_xmmm32_imm8 = 3835,
	EVEX_Vinsertps_xmm_xmm_xmmm32_imm8 = 3836,
	Pinsrd_xmm_rm32_imm8 = 3837,
	Pinsrq_xmm_rm64_imm8 = 3838,
	VEX_Vpinsrd_xmm_xmm_rm32_imm8 = 3839,
	VEX_Vpinsrq_xmm_xmm_rm64_imm8 = 3840,
	EVEX_Vpinsrd_xmm_xmm_rm32_imm8 = 3841,
	EVEX_Vpinsrq_xmm_xmm_rm64_imm8 = 3842,
	EVEX_Vshuff32x4_ymm_k1z_ymm_ymmm256b32_imm8 = 3843,
	EVEX_Vshuff32x4_zmm_k1z_zmm_zmmm512b32_imm8 = 3844,
	EVEX_Vshuff64x2_ymm_k1z_ymm_ymmm256b64_imm8 = 3845,
	EVEX_Vshuff64x2_zmm_k1z_zmm_zmmm512b64_imm8 = 3846,
	EVEX_Vpternlogd_xmm_k1z_xmm_xmmm128b32_imm8 = 3847,
	EVEX_Vpternlogd_ymm_k1z_ymm_ymmm256b32_imm8 = 3848,
	EVEX_Vpternlogd_zmm_k1z_zmm_zmmm512b32_imm8 = 3849,
	EVEX_Vpternlogq_xmm_k1z_xmm_xmmm128b64_imm8 = 3850,
	EVEX_Vpternlogq_ymm_k1z_ymm_ymmm256b64_imm8 = 3851,
	EVEX_Vpternlogq_zmm_k1z_zmm_zmmm512b64_imm8 = 3852,
	EVEX_Vgetmantps_xmm_k1z_xmmm128b32_imm8 = 3853,
	EVEX_Vgetmantps_ymm_k1z_ymmm256b32_imm8 = 3854,
	EVEX_Vgetmantps_zmm_k1z_zmmm512b32_imm8_sae = 3855,
	EVEX_Vgetmantpd_xmm_k1z_xmmm128b64_imm8 = 3856,
	EVEX_Vgetmantpd_ymm_k1z_ymmm256b64_imm8 = 3857,
	EVEX_Vgetmantpd_zmm_k1z_zmmm512b64_imm8_sae = 3858,
	EVEX_Vgetmantss_xmm_k1z_xmm_xmmm32_imm8_sae = 3859,
	EVEX_Vgetmantsd_xmm_k1z_xmm_xmmm64_imm8_sae = 3860,
	VEX_Kshiftrb_k_k_imm8 = 3861,
	VEX_Kshiftrw_k_k_imm8 = 3862,
	VEX_Kshiftrd_k_k_imm8 = 3863,
	VEX_Kshiftrq_k_k_imm8 = 3864,
	VEX_Kshiftlb_k_k_imm8 = 3865,
	VEX_Kshiftlw_k_k_imm8 = 3866,
	VEX_Kshiftld_k_k_imm8 = 3867,
	VEX_Kshiftlq_k_k_imm8 = 3868,
	VEX_Vinserti128_ymm_ymm_xmmm128_imm8 = 3869,
	EVEX_Vinserti32x4_ymm_k1z_ymm_xmmm128_imm8 = 3870,
	EVEX_Vinserti32x4_zmm_k1z_zmm_xmmm128_imm8 = 3871,
	EVEX_Vinserti64x2_ymm_k1z_ymm_xmmm128_imm8 = 3872,
	EVEX_Vinserti64x2_zmm_k1z_zmm_xmmm128_imm8 = 3873,
	VEX_Vextracti128_xmmm128_ymm_imm8 = 3874,
	EVEX_Vextracti32x4_xmmm128_k1z_ymm_imm8 = 3875,
	EVEX_Vextracti32x4_xmmm128_k1z_zmm_imm8 = 3876,
	EVEX_Vextracti64x2_xmmm128_k1z_ymm_imm8 = 3877,
	EVEX_Vextracti64x2_xmmm128_k1z_zmm_imm8 = 3878,
	EVEX_Vinserti32x8_zmm_k1z_zmm_ymmm256_imm8 = 3879,
	EVEX_Vinserti64x4_zmm_k1z_zmm_ymmm256_imm8 = 3880,
	EVEX_Vextracti32x8_ymmm256_k1z_zmm_imm8 = 3881,
	EVEX_Vextracti64x4_ymmm256_k1z_zmm_imm8 = 3882,
	EVEX_Vpcmpub_k_k1_xmm_xmmm128_imm8 = 3883,
	EVEX_Vpcmpub_k_k1_ymm_ymmm256_imm8 = 3884,
	EVEX_Vpcmpub_k_k1_zmm_zmmm512_imm8 = 3885,
	EVEX_Vpcmpuw_k_k1_xmm_xmmm128_imm8 = 3886,
	EVEX_Vpcmpuw_k_k1_ymm_ymmm256_imm8 = 3887,
	EVEX_Vpcmpuw_k_k1_zmm_zmmm512_imm8 = 3888,
	EVEX_Vpcmpb_k_k1_xmm_xmmm128_imm8 = 3889,
	EVEX_Vpcmpb_k_k1_ymm_ymmm256_imm8 = 3890,
	EVEX_Vpcmpb_k_k1_zmm_zmmm512_imm8 = 3891,
	EVEX_Vpcmpw_k_k1_xmm_xmmm128_imm8 = 3892,
	EVEX_Vpcmpw_k_k1_ymm_ymmm256_imm8 = 3893,
	EVEX_Vpcmpw_k_k1_zmm_zmmm512_imm8 = 3894,
	Dpps_xmm_xmmm128_imm8 = 3895,
	VEX_Vdpps_xmm_xmm_xmmm128_imm8 = 3896,
	VEX_Vdpps_ymm_ymm_ymmm256_imm8 = 3897,
	Dppd_xmm_xmmm128_imm8 = 3898,
	VEX_Vdppd_xmm_xmm_xmmm128_imm8 = 3899,
	Mpsadbw_xmm_xmmm128_imm8 = 3900,
	VEX_Vmpsadbw_xmm_xmm_xmmm128_imm8 = 3901,
	VEX_Vmpsadbw_ymm_ymm_ymmm256_imm8 = 3902,
	EVEX_Vdbpsadbw_xmm_k1z_xmm_xmmm128_imm8 = 3903,
	EVEX_Vdbpsadbw_ymm_k1z_ymm_ymmm256_imm8 = 3904,
	EVEX_Vdbpsadbw_zmm_k1z_zmm_zmmm512_imm8 = 3905,
	EVEX_Vshufi32x4_ymm_k1z_ymm_ymmm256b32_imm8 = 3906,
	EVEX_Vshufi32x4_zmm_k1z_zmm_zmmm512b32_imm8 = 3907,
	EVEX_Vshufi64x2_ymm_k1z_ymm_ymmm256b64_imm8 = 3908,
	EVEX_Vshufi64x2_zmm_k1z_zmm_zmmm512b64_imm8 = 3909,
	Pclmulqdq_xmm_xmmm128_imm8 = 3910,
	VEX_Vpclmulqdq_xmm_xmm_xmmm128_imm8 = 3911,
	VEX_Vpclmulqdq_ymm_ymm_ymmm256_imm8 = 3912,
	EVEX_Vpclmulqdq_xmm_xmm_xmmm128_imm8 = 3913,
	EVEX_Vpclmulqdq_ymm_ymm_ymmm256_imm8 = 3914,
	EVEX_Vpclmulqdq_zmm_zmm_zmmm512_imm8 = 3915,
	VEX_Vperm2i128_ymm_ymm_ymmm256_imm8 = 3916,
	VEX_Vpermil2ps_xmm_xmm_xmmm128_xmm_imm2 = 3917,
	VEX_Vpermil2ps_ymm_ymm_ymmm256_ymm_imm2 = 3918,
	VEX_Vpermil2ps_xmm_xmm_xmm_xmmm128_imm2 = 3919,
	VEX_Vpermil2ps_ymm_ymm_ymm_ymmm256_imm2 = 3920,
	VEX_Vpermil2pd_xmm_xmm_xmmm128_xmm_imm2 = 3921,
	VEX_Vpermil2pd_ymm_ymm_ymmm256_ymm_imm2 = 3922,
	VEX_Vpermil2pd_xmm_xmm_xmm_xmmm128_imm2 = 3923,
	VEX_Vpermil2pd_ymm_ymm_ymm_ymmm256_imm2 = 3924,
	VEX_Vblendvps_xmm_xmm_xmmm128_xmm = 3925,
	VEX_Vblendvps_ymm_ymm_ymmm256_ymm = 3926,
	VEX_Vblendvpd_xmm_xmm_xmmm128_xmm = 3927,
	VEX_Vblendvpd_ymm_ymm_ymmm256_ymm = 3928,
	VEX_Vpblendvb_xmm_xmm_xmmm128_xmm = 3929,
	VEX_Vpblendvb_ymm_ymm_ymmm256_ymm = 3930,
	EVEX_Vrangeps_xmm_k1z_xmm_xmmm128b32_imm8 = 3931,
	EVEX_Vrangeps_ymm_k1z_ymm_ymmm256b32_imm8 = 3932,
	EVEX_Vrangeps_zmm_k1z_zmm_zmmm512b32_imm8_sae = 3933,
	EVEX_Vrangepd_xmm_k1z_xmm_xmmm128b64_imm8 = 3934,
	EVEX_Vrangepd_ymm_k1z_ymm_ymmm256b64_imm8 = 3935,
	EVEX_Vrangepd_zmm_k1z_zmm_zmmm512b64_imm8_sae = 3936,
	EVEX_Vrangess_xmm_k1z_xmm_xmmm32_imm8_sae = 3937,
	EVEX_Vrangesd_xmm_k1z_xmm_xmmm64_imm8_sae = 3938,
	EVEX_Vfixupimmps_xmm_k1z_xmm_xmmm128b32_imm8 = 3939,
	EVEX_Vfixupimmps_ymm_k1z_ymm_ymmm256b32_imm8 = 3940,
	EVEX_Vfixupimmps_zmm_k1z_zmm_zmmm512b32_imm8_sae = 3941,
	EVEX_Vfixupimmpd_xmm_k1z_xmm_xmmm128b64_imm8 = 3942,
	EVEX_Vfixupimmpd_ymm_k1z_ymm_ymmm256b64_imm8 = 3943,
	EVEX_Vfixupimmpd_zmm_k1z_zmm_zmmm512b64_imm8_sae = 3944,
	EVEX_Vfixupimmss_xmm_k1z_xmm_xmmm32_imm8_sae = 3945,
	EVEX_Vfixupimmsd_xmm_k1z_xmm_xmmm64_imm8_sae = 3946,
	EVEX_Vreduceps_xmm_k1z_xmmm128b32_imm8 = 3947,
	EVEX_Vreduceps_ymm_k1z_ymmm256b32_imm8 = 3948,
	EVEX_Vreduceps_zmm_k1z_zmmm512b32_imm8_sae = 3949,
	EVEX_Vreducepd_xmm_k1z_xmmm128b64_imm8 = 3950,
	EVEX_Vreducepd_ymm_k1z_ymmm256b64_imm8 = 3951,
	EVEX_Vreducepd_zmm_k1z_zmmm512b64_imm8_sae = 3952,
	EVEX_Vreducess_xmm_k1z_xmm_xmmm32_imm8_sae = 3953,
	EVEX_Vreducesd_xmm_k1z_xmm_xmmm64_imm8_sae = 3954,
	VEX_Vfmaddsubps_xmm_xmm_xmmm128_xmm = 3955,
	VEX_Vfmaddsubps_ymm_ymm_ymmm256_ymm = 3956,
	VEX_Vfmaddsubps_xmm_xmm_xmm_xmmm128 = 3957,
	VEX_Vfmaddsubps_ymm_ymm_ymm_ymmm256 = 3958,
	VEX_Vfmaddsubpd_xmm_xmm_xmmm128_xmm = 3959,
	VEX_Vfmaddsubpd_ymm_ymm_ymmm256_ymm = 3960,
	VEX_Vfmaddsubpd_xmm_xmm_xmm_xmmm128 = 3961,
	VEX_Vfmaddsubpd_ymm_ymm_ymm_ymmm256 = 3962,
	VEX_Vfmsubaddps_xmm_xmm_xmmm128_xmm = 3963,
	VEX_Vfmsubaddps_ymm_ymm_ymmm256_ymm = 3964,
	VEX_Vfmsubaddps_xmm_xmm_xmm_xmmm128 = 3965,
	VEX_Vfmsubaddps_ymm_ymm_ymm_ymmm256 = 3966,
	VEX_Vfmsubaddpd_xmm_xmm_xmmm128_xmm = 3967,
	VEX_Vfmsubaddpd_ymm_ymm_ymmm256_ymm = 3968,
	VEX_Vfmsubaddpd_xmm_xmm_xmm_xmmm128 = 3969,
	VEX_Vfmsubaddpd_ymm_ymm_ymm_ymmm256 = 3970,
	Pcmpestrm_xmm_xmmm128_imm8 = 3971,
	Pcmpestrm64_xmm_xmmm128_imm8 = 3972,
	VEX_Vpcmpestrm_xmm_xmmm128_imm8 = 3973,
	VEX_Vpcmpestrm64_xmm_xmmm128_imm8 = 3974,
	Pcmpestri_xmm_xmmm128_imm8 = 3975,
	Pcmpestri64_xmm_xmmm128_imm8 = 3976,
	VEX_Vpcmpestri_xmm_xmmm128_imm8 = 3977,
	VEX_Vpcmpestri64_xmm_xmmm128_imm8 = 3978,
	Pcmpistrm_xmm_xmmm128_imm8 = 3979,
	VEX_Vpcmpistrm_xmm_xmmm128_imm8 = 3980,
	Pcmpistri_xmm_xmmm128_imm8 = 3981,
	VEX_Vpcmpistri_xmm_xmmm128_imm8 = 3982,
	EVEX_Vfpclassps_k_k1_xmmm128b32_imm8 = 3983,
	EVEX_Vfpclassps_k_k1_ymmm256b32_imm8 = 3984,
	EVEX_Vfpclassps_k_k1_zmmm512b32_imm8 = 3985,
	EVEX_Vfpclasspd_k_k1_xmmm128b64_imm8 = 3986,
	EVEX_Vfpclasspd_k_k1_ymmm256b64_imm8 = 3987,
	EVEX_Vfpclasspd_k_k1_zmmm512b64_imm8 = 3988,
	EVEX_Vfpclassss_k_k1_xmmm32_imm8 = 3989,
	EVEX_Vfpclasssd_k_k1_xmmm64_imm8 = 3990,
	VEX_Vfmaddps_xmm_xmm_xmmm128_xmm = 3991,
	VEX_Vfmaddps_ymm_ymm_ymmm256_ymm = 3992,
	VEX_Vfmaddps_xmm_xmm_xmm_xmmm128 = 3993,
	VEX_Vfmaddps_ymm_ymm_ymm_ymmm256 = 3994,
	VEX_Vfmaddpd_xmm_xmm_xmmm128_xmm = 3995,
	VEX_Vfmaddpd_ymm_ymm_ymmm256_ymm = 3996,
	VEX_Vfmaddpd_xmm_xmm_xmm_xmmm128 = 3997,
	VEX_Vfmaddpd_ymm_ymm_ymm_ymmm256 = 3998,
	VEX_Vfmaddss_xmm_xmm_xmmm32_xmm = 3999,
	VEX_Vfmaddss_xmm_xmm_xmm_xmmm32 = 4000,
	VEX_Vfmaddsd_xmm_xmm_xmmm64_xmm = 4001,
	VEX_Vfmaddsd_xmm_xmm_xmm_xmmm64 = 4002,
	VEX_Vfmsubps_xmm_xmm_xmmm128_xmm = 4003,
	VEX_Vfmsubps_ymm_ymm_ymmm256_ymm = 4004,
	VEX_Vfmsubps_xmm_xmm_xmm_xmmm128 = 4005,
	VEX_Vfmsubps_ymm_ymm_ymm_ymmm256 = 4006,
	VEX_Vfmsubpd_xmm_xmm_xmmm128_xmm = 4007,
	VEX_Vfmsubpd_ymm_ymm_ymmm256_ymm = 4008,
	VEX_Vfmsubpd_xmm_xmm_xmm_xmmm128 = 4009,
	VEX_Vfmsubpd_ymm_ymm_ymm_ymmm256 = 4010,
	VEX_Vfmsubss_xmm_xmm_xmmm32_xmm = 4011,
	VEX_Vfmsubss_xmm_xmm_xmm_xmmm32 = 4012,
	VEX_Vfmsubsd_xmm_xmm_xmmm64_xmm = 4013,
	VEX_Vfmsubsd_xmm_xmm_xmm_xmmm64 = 4014,
	EVEX_Vpshldw_xmm_k1z_xmm_xmmm128_imm8 = 4015,
	EVEX_Vpshldw_ymm_k1z_ymm_ymmm256_imm8 = 4016,
	EVEX_Vpshldw_zmm_k1z_zmm_zmmm512_imm8 = 4017,
	EVEX_Vpshldd_xmm_k1z_xmm_xmmm128b32_imm8 = 4018,
	EVEX_Vpshldd_ymm_k1z_ymm_ymmm256b32_imm8 = 4019,
	EVEX_Vpshldd_zmm_k1z_zmm_zmmm512b32_imm8 = 4020,
	EVEX_Vpshldq_xmm_k1z_xmm_xmmm128b64_imm8 = 4021,
	EVEX_Vpshldq_ymm_k1z_ymm_ymmm256b64_imm8 = 4022,
	EVEX_Vpshldq_zmm_k1z_zmm_zmmm512b64_imm8 = 4023,
	EVEX_Vpshrdw_xmm_k1z_xmm_xmmm128_imm8 = 4024,
	EVEX_Vpshrdw_ymm_k1z_ymm_ymmm256_imm8 = 4025,
	EVEX_Vpshrdw_zmm_k1z_zmm_zmmm512_imm8 = 4026,
	EVEX_Vpshrdd_xmm_k1z_xmm_xmmm128b32_imm8 = 4027,
	EVEX_Vpshrdd_ymm_k1z_ymm_ymmm256b32_imm8 = 4028,
	EVEX_Vpshrdd_zmm_k1z_zmm_zmmm512b32_imm8 = 4029,
	EVEX_Vpshrdq_xmm_k1z_xmm_xmmm128b64_imm8 = 4030,
	EVEX_Vpshrdq_ymm_k1z_ymm_ymmm256b64_imm8 = 4031,
	EVEX_Vpshrdq_zmm_k1z_zmm_zmmm512b64_imm8 = 4032,
	VEX_Vfnmaddps_xmm_xmm_xmmm128_xmm = 4033,
	VEX_Vfnmaddps_ymm_ymm_ymmm256_ymm = 4034,
	VEX_Vfnmaddps_xmm_xmm_xmm_xmmm128 = 4035,
	VEX_Vfnmaddps_ymm_ymm_ymm_ymmm256 = 4036,
	VEX_Vfnmaddpd_xmm_xmm_xmmm128_xmm = 4037,
	VEX_Vfnmaddpd_ymm_ymm_ymmm256_ymm = 4038,
	VEX_Vfnmaddpd_xmm_xmm_xmm_xmmm128 = 4039,
	VEX_Vfnmaddpd_ymm_ymm_ymm_ymmm256 = 4040,
	VEX_Vfnmaddss_xmm_xmm_xmmm32_xmm = 4041,
	VEX_Vfnmaddss_xmm_xmm_xmm_xmmm32 = 4042,
	VEX_Vfnmaddsd_xmm_xmm_xmmm64_xmm = 4043,
	VEX_Vfnmaddsd_xmm_xmm_xmm_xmmm64 = 4044,
	VEX_Vfnmsubps_xmm_xmm_xmmm128_xmm = 4045,
	VEX_Vfnmsubps_ymm_ymm_ymmm256_ymm = 4046,
	VEX_Vfnmsubps_xmm_xmm_xmm_xmmm128 = 4047,
	VEX_Vfnmsubps_ymm_ymm_ymm_ymmm256 = 4048,
	VEX_Vfnmsubpd_xmm_xmm_xmmm128_xmm = 4049,
	VEX_Vfnmsubpd_ymm_ymm_ymmm256_ymm = 4050,
	VEX_Vfnmsubpd_xmm_xmm_xmm_xmmm128 = 4051,
	VEX_Vfnmsubpd_ymm_ymm_ymm_ymmm256 = 4052,
	VEX_Vfnmsubss_xmm_xmm_xmmm32_xmm = 4053,
	VEX_Vfnmsubss_xmm_xmm_xmm_xmmm32 = 4054,
	VEX_Vfnmsubsd_xmm_xmm_xmmm64_xmm = 4055,
	VEX_Vfnmsubsd_xmm_xmm_xmm_xmmm64 = 4056,
	Sha1rnds4_xmm_xmmm128_imm8 = 4057,
	Gf2p8affineqb_xmm_xmmm128_imm8 = 4058,
	VEX_Vgf2p8affineqb_xmm_xmm_xmmm128_imm8 = 4059,
	VEX_Vgf2p8affineqb_ymm_ymm_ymmm256_imm8 = 4060,
	EVEX_Vgf2p8affineqb_xmm_k1z_xmm_xmmm128b64_imm8 = 4061,
	EVEX_Vgf2p8affineqb_ymm_k1z_ymm_ymmm256b64_imm8 = 4062,
	EVEX_Vgf2p8affineqb_zmm_k1z_zmm_zmmm512b64_imm8 = 4063,
	Gf2p8affineinvqb_xmm_xmmm128_imm8 = 4064,
	VEX_Vgf2p8affineinvqb_xmm_xmm_xmmm128_imm8 = 4065,
	VEX_Vgf2p8affineinvqb_ymm_ymm_ymmm256_imm8 = 4066,
	EVEX_Vgf2p8affineinvqb_xmm_k1z_xmm_xmmm128b64_imm8 = 4067,
	EVEX_Vgf2p8affineinvqb_ymm_k1z_ymm_ymmm256b64_imm8 = 4068,
	EVEX_Vgf2p8affineinvqb_zmm_k1z_zmm_zmmm512b64_imm8 = 4069,
	Aeskeygenassist_xmm_xmmm128_imm8 = 4070,
	VEX_Vaeskeygenassist_xmm_xmmm128_imm8 = 4071,
	VEX_Rorx_r32_rm32_imm8 = 4072,
	VEX_Rorx_r64_rm64_imm8 = 4073,
	XOP_Vpmacssww_xmm_xmm_xmmm128_xmm = 4074,
	XOP_Vpmacsswd_xmm_xmm_xmmm128_xmm = 4075,
	XOP_Vpmacssdql_xmm_xmm_xmmm128_xmm = 4076,
	XOP_Vpmacssdd_xmm_xmm_xmmm128_xmm = 4077,
	XOP_Vpmacssdqh_xmm_xmm_xmmm128_xmm = 4078,
	XOP_Vpmacsww_xmm_xmm_xmmm128_xmm = 4079,
	XOP_Vpmacswd_xmm_xmm_xmmm128_xmm = 4080,
	XOP_Vpmacsdql_xmm_xmm_xmmm128_xmm = 4081,
	XOP_Vpmacsdd_xmm_xmm_xmmm128_xmm = 4082,
	XOP_Vpmacsdqh_xmm_xmm_xmmm128_xmm = 4083,
	XOP_Vpcmov_xmm_xmm_xmmm128_xmm = 4084,
	XOP_Vpcmov_ymm_ymm_ymmm256_ymm = 4085,
	XOP_Vpcmov_xmm_xmm_xmm_xmmm128 = 4086,
	XOP_Vpcmov_ymm_ymm_ymm_ymmm256 = 4087,
	XOP_Vpperm_xmm_xmm_xmmm128_xmm = 4088,
	XOP_Vpperm_xmm_xmm_xmm_xmmm128 = 4089,
	XOP_Vpmadcsswd_xmm_xmm_xmmm128_xmm = 4090,
	XOP_Vpmadcswd_xmm_xmm_xmmm128_xmm = 4091,
	XOP_Vprotb_xmm_xmmm128_imm8 = 4092,
	XOP_Vprotw_xmm_xmmm128_imm8 = 4093,
	XOP_Vprotd_xmm_xmmm128_imm8 = 4094,
	XOP_Vprotq_xmm_xmmm128_imm8 = 4095,
	XOP_Vpcomb_xmm_xmm_xmmm128_imm8 = 4096,
	XOP_Vpcomw_xmm_xmm_xmmm128_imm8 = 4097,
	XOP_Vpcomd_xmm_xmm_xmmm128_imm8 = 4098,
	XOP_Vpcomq_xmm_xmm_xmmm128_imm8 = 4099,
	XOP_Vpcomub_xmm_xmm_xmmm128_imm8 = 4100,
	XOP_Vpcomuw_xmm_xmm_xmmm128_imm8 = 4101,
	XOP_Vpcomud_xmm_xmm_xmmm128_imm8 = 4102,
	XOP_Vpcomuq_xmm_xmm_xmmm128_imm8 = 4103,
	XOP_Blcfill_r32_rm32 = 4104,
	XOP_Blcfill_r64_rm64 = 4105,
	XOP_Blsfill_r32_rm32 = 4106,
	XOP_Blsfill_r64_rm64 = 4107,
	XOP_Blcs_r32_rm32 = 4108,
	XOP_Blcs_r64_rm64 = 4109,
	XOP_Tzmsk_r32_rm32 = 4110,
	XOP_Tzmsk_r64_rm64 = 4111,
	XOP_Blcic_r32_rm32 = 4112,
	XOP_Blcic_r64_rm64 = 4113,
	XOP_Blsic_r32_rm32 = 4114,
	XOP_Blsic_r64_rm64 = 4115,
	XOP_T1mskc_r32_rm32 = 4116,
	XOP_T1mskc_r64_rm64 = 4117,
	XOP_Blcmsk_r32_rm32 = 4118,
	XOP_Blcmsk_r64_rm64 = 4119,
	XOP_Blci_r32_rm32 = 4120,
	XOP_Blci_r64_rm64 = 4121,
	XOP_Llwpcb_r32 = 4122,
	XOP_Llwpcb_r64 = 4123,
	XOP_Slwpcb_r32 = 4124,
	XOP_Slwpcb_r64 = 4125,
	XOP_Vfrczps_xmm_xmmm128 = 4126,
	XOP_Vfrczps_ymm_ymmm256 = 4127,
	XOP_Vfrczpd_xmm_xmmm128 = 4128,
	XOP_Vfrczpd_ymm_ymmm256 = 4129,
	XOP_Vfrczss_xmm_xmmm32 = 4130,
	XOP_Vfrczsd_xmm_xmmm64 = 4131,
	XOP_Vprotb_xmm_xmmm128_xmm = 4132,
	XOP_Vprotb_xmm_xmm_xmmm128 = 4133,
	XOP_Vprotw_xmm_xmmm128_xmm = 4134,
	XOP_Vprotw_xmm_xmm_xmmm128 = 4135,
	XOP_Vprotd_xmm_xmmm128_xmm = 4136,
	XOP_Vprotd_xmm_xmm_xmmm128 = 4137,
	XOP_Vprotq_xmm_xmmm128_xmm = 4138,
	XOP_Vprotq_xmm_xmm_xmmm128 = 4139,
	XOP_Vpshlb_xmm_xmmm128_xmm = 4140,
	XOP_Vpshlb_xmm_xmm_xmmm128 = 4141,
	XOP_Vpshlw_xmm_xmmm128_xmm = 4142,
	XOP_Vpshlw_xmm_xmm_xmmm128 = 4143,
	XOP_Vpshld_xmm_xmmm128_xmm = 4144,
	XOP_Vpshld_xmm_xmm_xmmm128 = 4145,
	XOP_Vpshlq_xmm_xmmm128_xmm = 4146,
	XOP_Vpshlq_xmm_xmm_xmmm128 = 4147,
	XOP_Vpshab_xmm_xmmm128_xmm = 4148,
	XOP_Vpshab_xmm_xmm_xmmm128 = 4149,
	XOP_Vpshaw_xmm_xmmm128_xmm = 4150,
	XOP_Vpshaw_xmm_xmm_xmmm128 = 4151,
	XOP_Vpshad_xmm_xmmm128_xmm = 4152,
	XOP_Vpshad_xmm_xmm_xmmm128 = 4153,
	XOP_Vpshaq_xmm_xmmm128_xmm = 4154,
	XOP_Vpshaq_xmm_xmm_xmmm128 = 4155,
	XOP_Vphaddbw_xmm_xmmm128 = 4156,
	XOP_Vphaddbd_xmm_xmmm128 = 4157,
	XOP_Vphaddbq_xmm_xmmm128 = 4158,
	XOP_Vphaddwd_xmm_xmmm128 = 4159,
	XOP_Vphaddwq_xmm_xmmm128 = 4160,
	XOP_Vphadddq_xmm_xmmm128 = 4161,
	XOP_Vphaddubw_xmm_xmmm128 = 4162,
	XOP_Vphaddubd_xmm_xmmm128 = 4163,
	XOP_Vphaddubq_xmm_xmmm128 = 4164,
	XOP_Vphadduwd_xmm_xmmm128 = 4165,
	XOP_Vphadduwq_xmm_xmmm128 = 4166,
	XOP_Vphaddudq_xmm_xmmm128 = 4167,
	XOP_Vphsubbw_xmm_xmmm128 = 4168,
	XOP_Vphsubwd_xmm_xmmm128 = 4169,
	XOP_Vphsubdq_xmm_xmmm128 = 4170,
	XOP_Bextr_r32_rm32_imm32 = 4171,
	XOP_Bextr_r64_rm64_imm32 = 4172,
	XOP_Lwpins_r32_rm32_imm32 = 4173,
	XOP_Lwpins_r64_rm32_imm32 = 4174,
	XOP_Lwpval_r32_rm32_imm32 = 4175,
	XOP_Lwpval_r64_rm32_imm32 = 4176,
	D3NOW_Pi2fw_mm_mmm64 = 4177,
	D3NOW_Pi2fd_mm_mmm64 = 4178,
	D3NOW_Pf2iw_mm_mmm64 = 4179,
	D3NOW_Pf2id_mm_mmm64 = 4180,
	D3NOW_Pfrcpv_mm_mmm64 = 4181,
	D3NOW_Pfrsqrtv_mm_mmm64 = 4182,
	D3NOW_Pfnacc_mm_mmm64 = 4183,
	D3NOW_Pfpnacc_mm_mmm64 = 4184,
	D3NOW_Pfcmpge_mm_mmm64 = 4185,
	D3NOW_Pfmin_mm_mmm64 = 4186,
	D3NOW_Pfrcp_mm_mmm64 = 4187,
	D3NOW_Pfrsqrt_mm_mmm64 = 4188,
	D3NOW_Pfsub_mm_mmm64 = 4189,
	D3NOW_Pfadd_mm_mmm64 = 4190,
	D3NOW_Pfcmpgt_mm_mmm64 = 4191,
	D3NOW_Pfmax_mm_mmm64 = 4192,
	D3NOW_Pfrcpit1_mm_mmm64 = 4193,
	D3NOW_Pfrsqit1_mm_mmm64 = 4194,
	D3NOW_Pfsubr_mm_mmm64 = 4195,
	D3NOW_Pfacc_mm_mmm64 = 4196,
	D3NOW_Pfcmpeq_mm_mmm64 = 4197,
	D3NOW_Pfmul_mm_mmm64 = 4198,
	D3NOW_Pfrcpit2_mm_mmm64 = 4199,
	D3NOW_Pmulhrw_mm_mmm64 = 4200,
	D3NOW_Pswapd_mm_mmm64 = 4201,
	D3NOW_Pavgusb_mm_mmm64 = 4202,
	Rmpadjust = 4203,
	Rmpupdate = 4204,
	Psmash = 4205,
	Pvalidatew = 4206,
	Pvalidated = 4207,
	Pvalidateq = 4208,
	Serialize = 4209,
	Xsusldtrk = 4210,
	Xresldtrk = 4211,
	Invlpgbw = 4212,
	Invlpgbd = 4213,
	Invlpgbq = 4214,
	Tlbsync = 4215,
	PrefetchReserved3_m8 = 4216,
	PrefetchReserved4_m8 = 4217,
	PrefetchReserved5_m8 = 4218,
	PrefetchReserved6_m8 = 4219,
	PrefetchReserved7_m8 = 4220,
}
// GENERATOR-END: Enum

#[allow(dead_code)]
pub(crate) fn code_to_iced(value: Code) -> iced_x86_rust::Code {
	// Safe, the enums are exactly identical
	unsafe { std::mem::transmute(value as u16) }
}

#[allow(dead_code)]
pub(crate) fn iced_to_code(value: iced_x86_rust::Code) -> Code {
	// Safe, the enums are exactly identical
	unsafe { std::mem::transmute(value as u16) }
}
